Commit 72cda9bb authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher
Browse files

drm/amdgpu: pin the csb buffer on hw init for gfx v8 



Without this pin, the csb buffer will be filled with inconsistent
data after S3 resume. And that will causes gfx hang on gfxoff
exit since this csb will be executed then.

Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Tested-by: default avatarPaul Gover <pmw.gover@yahoo.co.uk>
Reviewed-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
Reviewed-by: default avatarXiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b8870118

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+40 −0
Original line number Original line Diff line number Diff line
@@ -1321,6 +1321,39 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device *adev) 
	return 0;

	return 0;

}

}





static int gfx_v8_0_csb_vram_pin(struct amdgpu_device *adev)

{

	int r;



	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);

	if (unlikely(r != 0))

		return r;



	r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,

			AMDGPU_GEM_DOMAIN_VRAM);

	if (!r)

		adev->gfx.rlc.clear_state_gpu_addr =

			amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);



	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);



	return r;

}



static void gfx_v8_0_csb_vram_unpin(struct amdgpu_device *adev)

{

	int r;



	if (!adev->gfx.rlc.clear_state_obj)

		return;



	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);

	if (likely(r == 0)) {

		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);

		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);

	}

}



static void gfx_v8_0_mec_fini(struct amdgpu_device *adev)

static void gfx_v8_0_mec_fini(struct amdgpu_device *adev)

{

{

	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);

	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
@@ -4785,6 +4818,10 @@ static int gfx_v8_0_hw_init(void *handle) 
	gfx_v8_0_init_golden_registers(adev);

	gfx_v8_0_init_golden_registers(adev);

	gfx_v8_0_constants_init(adev);

	gfx_v8_0_constants_init(adev);





	r = gfx_v8_0_csb_vram_pin(adev);

	if (r)

		return r;



	r = adev->gfx.rlc.funcs->resume(adev);

	r = adev->gfx.rlc.funcs->resume(adev);

	if (r)

	if (r)

		return r;

		return r;
@@ -4901,6 +4938,9 @@ static int gfx_v8_0_hw_fini(void *handle) 
	else

	else

		pr_err("rlc is busy, skip halt rlc\n");

		pr_err("rlc is busy, skip halt rlc\n");

	amdgpu_gfx_rlc_exit_safe_mode(adev);

	amdgpu_gfx_rlc_exit_safe_mode(adev);



	gfx_v8_0_csb_vram_unpin(adev);



	return 0;

	return 0;

}

}

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