Commit 72a8edc2 authored Jun 22, 2018 by Marc Zyngier Committed by Thomas Gleixner Jun 22, 2018

genirq/debugfs: Add missing IRQCHIP_SUPPORTS_LEVEL_MSI debug



Debug is missing the IRQCHIP_SUPPORTS_LEVEL_MSI debug entry, making debugfs
slightly less useful.

Take this opportunity to also add a missing comment in the definition of
IRQCHIP_SUPPORTS_LEVEL_MSI.

Fixes: 6988e0e0 ("genirq/msi: Limit level-triggered MSI to platform devices")
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Yang Yingliang <yangyingliang@huawei.com>
Cc: Sumit Garg <sumit.garg@linaro.org>
Link: https://lkml.kernel.org/r/20180622095254.5906-2-marc.zyngier@arm.com

parent 9ffc59d5

include/linux/irq.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -503,6 +503,7 @@ struct irq_chip {
		* IRQCHIP_SKIP_SET_WAKE: Skip chip.irq_set_wake(), for this irq chip
		* IRQCHIP_ONESHOT_SAFE: One shot does not require mask/unmask
		* IRQCHIP_EOI_THREADED: Chip requires eoi() on unmask in threaded mode
		* IRQCHIP_SUPPORTS_LEVEL_MSI Chip can provide two doorbells for Level MSIs
		*/
		enum {
		IRQCHIP_SET_TYPE_MASKED = (1 << 0),

kernel/irq/debugfs.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -55,6 +55,7 @@ static const struct irq_bit_descr irqchip_flags[] = {
		BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE),
		BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE),
		BIT_MASK_DESCR(IRQCHIP_EOI_THREADED),
		BIT_MASK_DESCR(IRQCHIP_SUPPORTS_LEVEL_MSI),
		};

		static void

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