Commit 72a73a69 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6 

* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (28 commits)
  PCI: make arch/i386/pci/common.c:pci_bf_sort static
  PCI: ibmphp_pci.c: fix NULL dereference
  pciehp: remove unnecessary pci_disable_msi
  pciehp: remove unnecessary free_irq
  PCI: rpaphp: change device tree examination
  PCI: Change memory allocation for acpiphp slots
  i2c-i801: SMBus patch for Intel ICH9
  PCI: irq: irq and pci_ids patch for Intel ICH9
  PCI: pci_{enable,disable}_device() nestable ports
  PCI: switch pci_{enable,disable}_device() to be nestable
  PCI: arch/i386/kernel/pci-dma.c: ioremap balanced with iounmap
  pci/i386: style cleanups
  PCI: Block on access to temporarily unavailable pci device
  pci: fix __pci_register_driver error handling
  pci: clear osc support flags if no _OSC method
  acpiphp: fix missing acpiphp_glue_exit()
  acpiphp: fix use of list_for_each macro
  Altix: Initial ACPI support - ROM shadowing.
  Altix: SN ACPI hotplug support.
  Altix: Add initial ACPI IO support
  ...
parents 4549df89 2b290da0

arch/i386/kernel/pci-dma.c

+3 −1
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ EXPORT_SYMBOL(dma_free_coherent); 
int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,

				dma_addr_t device_addr, size_t size, int flags)

{

	void __iomem *mem_base;

	void __iomem *mem_base = NULL;

	int pages = size >> PAGE_SHIFT;

	int bitmap_size = (pages + 31)/32;
@@ -114,6 +114,8 @@ int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, 
 free1_out:

	kfree(dev->dma_mem->bitmap);

 out:

	if (mem_base)

		iounmap(mem_base);

	return 0;

}

EXPORT_SYMBOL(dma_declare_coherent_memory);

arch/i386/pci/common.c

+1 −1
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ 
unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |

				PCI_PROBE_MMCONF;



int pci_bf_sort;

static int pci_bf_sort;

int pci_routeirq;

int pcibios_last_bus = -1;

unsigned long pirq_table_addr;

arch/i386/pci/fixup.c

+0 −46
Original line number Diff line number Diff line
@@ -74,52 +74,6 @@ static void __devinit pci_fixup_ncr53c810(struct pci_dev *d) 
}

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, pci_fixup_ncr53c810);



static void __devinit pci_fixup_ide_bases(struct pci_dev *d)

{

	int i;



	/*

	 * PCI IDE controllers use non-standard I/O port decoding, respect it.

	 */

	if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)

		return;

	DBG("PCI: IDE base address fixup for %s\n", pci_name(d));

	for(i=0; i<4; i++) {

		struct resource *r = &d->resource[i];

		if ((r->start & ~0x80) == 0x374) {

			r->start |= 2;

			r->end = r->start;

		}

	}

}

DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);



static void __devinit  pci_fixup_ide_trash(struct pci_dev *d)

{

	int i;



	/*

	 * Runs the fixup only for the first IDE controller

	 * (Shai Fultheim - shai@ftcon.com)

	 */

	static int called = 0;

	if (called)

		return;

	called = 1;



	/*

	 * There exist PCI IDE controllers which have utter garbage

	 * in first four base registers. Ignore that.

	 */

	DBG("PCI: IDE base address trash cleared for %s\n", pci_name(d));

	for(i=0; i<4; i++)

		d->resource[i].start = d->resource[i].end = d->resource[i].flags = 0;

}

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5513, pci_fixup_ide_trash);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, pci_fixup_ide_trash);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_11, pci_fixup_ide_trash);

DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_9, pci_fixup_ide_trash);



static void __devinit  pci_fixup_latency(struct pci_dev *d)

{

	/*

arch/i386/pci/i386.c

+43 −21
Original line number Diff line number Diff line
@@ -104,16 +104,24 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list) 
	/* Depth-First Search on bus tree */

	list_for_each_entry(bus, bus_list, node) {

		if ((dev = bus->self)) {

			for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {

			for (idx = PCI_BRIDGE_RESOURCES;

			    idx < PCI_NUM_RESOURCES; idx++) {

				r = &dev->resource[idx];

				if (!r->flags)

					continue;

				pr = pci_find_parent_resource(dev, r);

				if (!r->start || !pr || request_resource(pr, r) < 0) {

					printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, pci_name(dev));

					/* Something is wrong with the region.

					   Invalidate the resource to prevent child

					   resource allocations in this range. */

				if (!r->start || !pr ||

				    request_resource(pr, r) < 0) {

					printk(KERN_ERR "PCI: Cannot allocate "

						"resource region %d "

						"of bridge %s\n",

						idx, pci_name(dev));

					/*

					 * Something is wrong with the region.

					 * Invalidate the resource to prevent

					 * child resource allocations in this

					 * range.

					 */

					r->flags = 0;

				}

			}
@@ -131,7 +139,7 @@ static void __init pcibios_allocate_resources(int pass) 


	for_each_pci_dev(dev) {

		pci_read_config_word(dev, PCI_COMMAND, &command);

		for(idx = 0; idx < 6; idx++) {

		for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) {

			r = &dev->resource[idx];

			if (r->parent)		/* Already allocated */

				continue;
@@ -142,11 +150,15 @@ static void __init pcibios_allocate_resources(int pass) 
			else

				disabled = !(command & PCI_COMMAND_MEMORY);

			if (pass == disabled) {

				DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n",

				DBG("PCI: Resource %08lx-%08lx "

				    "(f=%lx, d=%d, p=%d)\n",

				    r->start, r->end, r->flags, disabled, pass);

				pr = pci_find_parent_resource(dev, r);

				if (!pr || request_resource(pr, r) < 0) {

					printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, pci_name(dev));

					printk(KERN_ERR "PCI: Cannot allocate "

						"resource region %d "

						"of device %s\n",

						idx, pci_name(dev));

					/* We'll assign a new address later */

					r->end -= r->start;

					r->start = 0;
@@ -156,12 +168,16 @@ static void __init pcibios_allocate_resources(int pass) 
		if (!pass) {

			r = &dev->resource[PCI_ROM_RESOURCE];

			if (r->flags & IORESOURCE_ROM_ENABLE) {

				/* Turn the ROM off, leave the resource region, but keep it unregistered. */

				/* Turn the ROM off, leave the resource region,

				 * but keep it unregistered. */

				u32 reg;

				DBG("PCI: Switching off ROM of %s\n", pci_name(dev));

				DBG("PCI: Switching off ROM of %s\n",

					pci_name(dev));

				r->flags &= ~IORESOURCE_ROM_ENABLE;

				pci_read_config_dword(dev, dev->rom_base_reg, &reg);

				pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);

				pci_read_config_dword(dev,

						dev->rom_base_reg, &reg);

				pci_write_config_dword(dev, dev->rom_base_reg,

						reg & ~PCI_ROM_ADDRESS_ENABLE);

			}

		}

	}
@@ -173,9 +189,11 @@ static int __init pcibios_assign_resources(void) 
	struct resource *r, *pr;



	if (!(pci_probe & PCI_ASSIGN_ROMS)) {

		/* Try to use BIOS settings for ROMs, otherwise let

		   pci_assign_unassigned_resources() allocate the new

		   addresses. */

		/*

		 * Try to use BIOS settings for ROMs, otherwise let

		 * pci_assign_unassigned_resources() allocate the new

		 * addresses.

		 */

		for_each_pci_dev(dev) {

			r = &dev->resource[PCI_ROM_RESOURCE];

			if (!r->flags || !r->start)
@@ -227,7 +245,9 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask) 
				(!(r->flags & IORESOURCE_ROM_ENABLE)))

			continue;

		if (!r->start && r->end) {

			printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));

			printk(KERN_ERR "PCI: Device %s not available "

				"because of resource collisions\n",

				pci_name(dev));

			return -EINVAL;

		}

		if (r->flags & IORESOURCE_IO)
@@ -236,7 +256,8 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask) 
			cmd |= PCI_COMMAND_MEMORY;

	}

	if (cmd != old_cmd) {

		printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);

		printk("PCI: Enabling device %s (%04x -> %04x)\n",

			pci_name(dev), old_cmd, cmd);

		pci_write_config_word(dev, PCI_COMMAND, cmd);

	}

	return 0;
@@ -258,7 +279,8 @@ void pcibios_set_master(struct pci_dev *dev) 
		lat = pcibios_max_latency;

	else

		return;

	printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);

	printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n",

		pci_name(dev), lat);

	pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);

}

arch/i386/pci/irq.c

+6 −0
Original line number Diff line number Diff line
@@ -543,6 +543,12 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route 
		case PCI_DEVICE_ID_INTEL_ICH8_2:

		case PCI_DEVICE_ID_INTEL_ICH8_3:

		case PCI_DEVICE_ID_INTEL_ICH8_4:

		case PCI_DEVICE_ID_INTEL_ICH9_0:

		case PCI_DEVICE_ID_INTEL_ICH9_1:

		case PCI_DEVICE_ID_INTEL_ICH9_2:

		case PCI_DEVICE_ID_INTEL_ICH9_3:

		case PCI_DEVICE_ID_INTEL_ICH9_4:

		case PCI_DEVICE_ID_INTEL_ICH9_5:

			r->name = "PIIX/ICH";

			r->get = pirq_piix_get;

			r->set = pirq_piix_set;

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