Commit 7249c8ea authored by Guy Levi's avatar Guy Levi Committed by Jason Gunthorpe
Browse files

IB/mlx5: Fix scatter to CQE in DCT QP creation 



When scatter to CQE is enabled on a DCT QP it corrupts the mailbox command
since it tried to treat it as as QP create mailbox command instead of a
DCT create command.

The corrupted mailbox command causes userspace to malfunction as the
device doesn't create the QP as expected.

A new mlx5 capability is exposed to user-space which ensures that it will
not enable the feature on DCT without this fix in the kernel.

Fixes: 5d6ff1ba ("IB/mlx5: Support scatter to CQE for DC transport type")
Signed-off-by: default avatarGuy Levi <guyle@mellanox.com>
Signed-off-by: default avatarLeon Romanovsky <leonro@mellanox.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@mellanox.com>
parent 7c39f7f6

drivers/infiniband/hw/mlx5/main.c

+2 −0
Original line number Diff line number Diff line
@@ -1119,6 +1119,8 @@ static int mlx5_ib_query_device(struct ib_device *ibdev, 
		if (MLX5_CAP_GEN(mdev, qp_packet_based))

			resp.flags |=

				MLX5_IB_QUERY_DEV_RESP_PACKET_BASED_CREDIT_MODE;



		resp.flags |= MLX5_IB_QUERY_DEV_RESP_FLAGS_SCAT2CQE_DCT;

	}



	if (field_avail(typeof(resp), sw_parsing_caps,

drivers/infiniband/hw/mlx5/qp.c

+7 −4
Original line number Diff line number Diff line
@@ -1818,13 +1818,16 @@ static void configure_responder_scat_cqe(struct ib_qp_init_attr *init_attr, 


	rcqe_sz = mlx5_ib_get_cqe_size(init_attr->recv_cq);



	if (rcqe_sz == 128) {

		MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE);

	if (init_attr->qp_type == MLX5_IB_QPT_DCT) {

		if (rcqe_sz == 128)

			MLX5_SET(dctc, qpc, cs_res, MLX5_RES_SCAT_DATA64_CQE);



		return;

	}



	if (init_attr->qp_type != MLX5_IB_QPT_DCT)

		MLX5_SET(qpc, qpc, cs_res, MLX5_RES_SCAT_DATA32_CQE);

	MLX5_SET(qpc, qpc, cs_res,

		 rcqe_sz == 128 ? MLX5_RES_SCAT_DATA64_CQE :

				  MLX5_RES_SCAT_DATA32_CQE);

}



static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev,

include/uapi/rdma/mlx5-abi.h

+1 −0
Original line number Diff line number Diff line
@@ -238,6 +238,7 @@ enum mlx5_ib_query_dev_resp_flags { 
	MLX5_IB_QUERY_DEV_RESP_FLAGS_CQE_128B_COMP = 1 << 0,

	MLX5_IB_QUERY_DEV_RESP_FLAGS_CQE_128B_PAD  = 1 << 1,

	MLX5_IB_QUERY_DEV_RESP_PACKET_BASED_CREDIT_MODE = 1 << 2,

	MLX5_IB_QUERY_DEV_RESP_FLAGS_SCAT2CQE_DCT = 1 << 3,

};



enum mlx5_ib_tunnel_offloads {

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