Commit 722e039d authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

Merge tag 'kvmarm-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD 

KVM/arm64 updates for Linux 5.11

- PSCI relay at EL2 when "protected KVM" is enabled
- New exception injection code
- Simplification of AArch32 system register handling
- Fix PMU accesses when no PMU is enabled
- Expose CSV3 on non-Meltdown hosts
- Cache hierarchy discovery fixes
- PV steal-time cleanups
- Allow function pointers at EL2
- Various host EL2 entry cleanups
- Simplification of the EL2 vector allocation
parents 8640ca58 3a514592

.mailmap

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Original line number Diff line number Diff line
@@ -82,7 +82,10 @@ Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@gmail.com> 
Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@imgtec.com>

Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@mips.com>

<dev.kurt@vandijck-laurijssen.be> <kurt.van.dijck@eia.be>

Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>

Dmitry Baryshkov <dbaryshkov@gmail.com>

Dmitry Baryshkov <dbaryshkov@gmail.com> <[dbaryshkov@gmail.com]>

Dmitry Baryshkov <dbaryshkov@gmail.com> <dmitry_baryshkov@mentor.com>

Dmitry Baryshkov <dbaryshkov@gmail.com> <dmitry_eremin@mentor.com>

Dmitry Safonov <0x7f454c46@gmail.com> <dima@arista.com>

Dmitry Safonov <0x7f454c46@gmail.com> <d.safonov@partner.samsung.com>

Dmitry Safonov <0x7f454c46@gmail.com> <dsafonov@virtuozzo.com>

Documentation/admin-guide/kernel-parameters.txt

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@@ -2259,6 +2259,16 @@ 
			for all guests.

			Default is 1 (enabled) if in 64-bit or 32-bit PAE mode.



	kvm-arm.mode=

			[KVM,ARM] Select one of KVM/arm64's modes of operation.



			protected: nVHE-based mode with support for guests whose

				   state is kept private from the host.

				   Not valid if the kernel is running in EL2.



			Defaults to VHE/nVHE based on hardware support and

			the value of CONFIG_ARM64_VHE.



	kvm-arm.vgic_v3_group0_trap=

			[KVM,ARM] Trap guest accesses to GICv3 group-0

			system registers

Documentation/arm64/memory.rst

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@@ -100,7 +100,7 @@ hypervisor maps kernel pages in EL2 at a fixed (and potentially 
random) offset from the linear mapping. See the kern_hyp_va macro and

kvm_update_va_mask function for more details. MMIO devices such as

GICv2 gets mapped next to the HYP idmap page, as do vectors when

ARM64_HARDEN_EL2_VECTORS is selected for particular CPUs.

ARM64_SPECTRE_V3A is enabled for particular CPUs.



When using KVM with the Virtualization Host Extensions, no additional

mappings are created, since the host kernel runs directly in EL2.

Documentation/devicetree/bindings/clock/imx5-clock.yaml

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@@ -57,7 +57,7 @@ examples: 
    };



    can@53fc8000 {

        compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";

        compatible = "fsl,imx53-flexcan", "fsl,imx25-flexcan";

        reg = <0x53fc8000 0x4000>;

        interrupts = <82>;

        clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>, <&clks IMX5_CLK_CAN1_SERIAL_GATE>;

Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml

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@@ -20,14 +20,17 @@ properties: 
          - fsl,imx8qm-flexcan

          - fsl,imx8mp-flexcan

          - fsl,imx6q-flexcan

          - fsl,imx53-flexcan

          - fsl,imx35-flexcan

          - fsl,imx28-flexcan

          - fsl,imx25-flexcan

          - fsl,p1010-flexcan

          - fsl,vf610-flexcan

          - fsl,ls1021ar2-flexcan

          - fsl,lx2160ar1-flexcan

      - items:

          - enum:

              - fsl,imx53-flexcan

              - fsl,imx35-flexcan

          - const: fsl,imx25-flexcan

      - items:

          - enum:

              - fsl,imx7d-flexcan
@@ -80,6 +83,7 @@ properties: 
      req_gpr is the gpr register offset of CAN stop request.

      req_bit is the bit offset of CAN stop request.

    $ref: /schemas/types.yaml#/definitions/phandle-array

    items:

      items:

        - description: The 'gpr' is the phandle to general purpose register node.

        - description: The 'req_gpr' is the gpr register offset of CAN stop request.

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