Unverified Commit 72161e0e authored by Mark Brown's avatar Mark Brown
Browse files

Merge series "Add support for SOF on i.MX8M" from Daniel Baluta <daniel.baluta@oss.nxp.com> 

Daniel Baluta <daniel.baluta@nxp.com>:

From: Daniel Baluta <daniel.baluta@nxp.com>

This patch series adds support for SOF on i.MX8M family. First board
from this family that has a DSP is i.MX8MP.

First 2 patches are trying to fix some compilation issues, the next two
are adding the imx8m support and the last one adds the devicetree
binding.

Changes since v2:
 - add reviewed by from Rob to DT patch
 - fix ownership for patch 2

Daniel Baluta (3):
  ASoC: SOF: imx: Add i.MX8M HW support
  ASoC: SOF: Add i.MX8MP device descriptor
  dt-bindings: dsp: fsl: Add fsl,imx8mp-dsp entry

Pierre-Louis Bossart (1):
  ASoC: SOF: imx: fix undefined reference issue

YueHaibing (1):
  ASoC: SOF: imx8: Fix randbuild error

 .../devicetree/bindings/dsp/fsl,dsp.yaml      |   2 +
 sound/soc/sof/imx/Kconfig                     |  32 +-
 sound/soc/sof/imx/Makefile                    |   2 +
 sound/soc/sof/imx/imx8m.c                     | 279 ++++++++++++++++++
 sound/soc/sof/sof-of-dev.c                    |  14 +
 5 files changed, 325 insertions(+), 4 deletions(-)
 create mode 100644 sound/soc/sof/imx/imx8m.c

--
2.17.1
parents 980f9177 35a0f242

Documentation/devicetree/bindings/dsp/fsl,dsp.yaml

+2 −0
Original line number Diff line number Diff line
@@ -17,6 +17,8 @@ properties: 
  compatible:

    enum:

      - fsl,imx8qxp-dsp

      - fsl,imx8qm-dsp

      - fsl,imx8mp-dsp



  reg:

    description: Should contain register location and length

include/sound/soc-dai.h

+0 −1
Original line number Diff line number Diff line
@@ -351,7 +351,6 @@ struct snd_soc_dai { 


	/* bit field */

	unsigned int probed:1;

	unsigned int started[SNDRV_PCM_STREAM_LAST + 1];

};



static inline struct snd_soc_pcm_stream *

sound/soc/codecs/sgtl5000.c

+34 −0
Original line number Diff line number Diff line
@@ -1653,6 +1653,40 @@ static int sgtl5000_i2c_probe(struct i2c_client *client, 
		dev_err(&client->dev,

			"Error %d initializing CHIP_CLK_CTRL\n", ret);



	/* Mute everything to avoid pop from the following power-up */

	ret = regmap_write(sgtl5000->regmap, SGTL5000_CHIP_ANA_CTRL,

			   SGTL5000_CHIP_ANA_CTRL_DEFAULT);

	if (ret) {

		dev_err(&client->dev,

			"Error %d muting outputs via CHIP_ANA_CTRL\n", ret);

		goto disable_clk;

	}



	/*

	 * If VAG is powered-on (e.g. from previous boot), it would be disabled

	 * by the write to ANA_POWER in later steps of the probe code. This

	 * may create a loud pop even with all outputs muted. The proper way

	 * to circumvent this is disabling the bit first and waiting the proper

	 * cool-down time.

	 */

	ret = regmap_read(sgtl5000->regmap, SGTL5000_CHIP_ANA_POWER, &value);

	if (ret) {

		dev_err(&client->dev, "Failed to read ANA_POWER: %d\n", ret);

		goto disable_clk;

	}

	if (value & SGTL5000_VAG_POWERUP) {

		ret = regmap_update_bits(sgtl5000->regmap,

					 SGTL5000_CHIP_ANA_POWER,

					 SGTL5000_VAG_POWERUP,

					 0);

		if (ret) {

			dev_err(&client->dev, "Error %d disabling VAG\n", ret);

			goto disable_clk;

		}



		msleep(SGTL5000_VAG_POWERDOWN_DELAY);

	}



	/* Follow section 2.2.1.1 of AN3663 */

	ana_pwr = SGTL5000_ANA_POWER_DEFAULT;

	if (sgtl5000->num_supplies <= VDDD) {

sound/soc/codecs/sgtl5000.h

+1 −0
Original line number Diff line number Diff line
@@ -233,6 +233,7 @@ 
/*

 * SGTL5000_CHIP_ANA_CTRL

 */

#define SGTL5000_CHIP_ANA_CTRL_DEFAULT		0x0133

#define SGTL5000_LINE_OUT_MUTE			0x0100

#define SGTL5000_HP_SEL_MASK			0x0040

#define SGTL5000_HP_SEL_SHIFT			6

sound/soc/qcom/qdsp6/q6afe-dai.c

+16 −0
Original line number Diff line number Diff line
@@ -902,6 +902,8 @@ static struct snd_soc_dai_driver q6afe_dais[] = { 
				 SNDRV_PCM_RATE_16000,

			.formats = SNDRV_PCM_FMTBIT_S16_LE |

				   SNDRV_PCM_FMTBIT_S24_LE,

			.channels_min = 1,

			.channels_max = 8,

			.rate_min =     8000,

			.rate_max =     48000,

		},
@@ -917,6 +919,8 @@ static struct snd_soc_dai_driver q6afe_dais[] = { 
				 SNDRV_PCM_RATE_16000,

			.formats = SNDRV_PCM_FMTBIT_S16_LE |

				   SNDRV_PCM_FMTBIT_S24_LE,

			.channels_min = 1,

			.channels_max = 8,

			.rate_min =     8000,

			.rate_max =     48000,

		},
@@ -931,6 +935,8 @@ static struct snd_soc_dai_driver q6afe_dais[] = { 
			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |

				 SNDRV_PCM_RATE_16000,

			.formats = SNDRV_PCM_FMTBIT_S16_LE,

			.channels_min = 1,

			.channels_max = 8,

			.rate_min =     8000,

			.rate_max =     48000,

		},
@@ -946,6 +952,8 @@ static struct snd_soc_dai_driver q6afe_dais[] = { 
				 SNDRV_PCM_RATE_16000,

			.formats = SNDRV_PCM_FMTBIT_S16_LE |

				   SNDRV_PCM_FMTBIT_S24_LE,

			.channels_min = 1,

			.channels_max = 8,

			.rate_min =     8000,

			.rate_max =     48000,

		},
@@ -960,6 +968,8 @@ static struct snd_soc_dai_driver q6afe_dais[] = { 
			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |

				 SNDRV_PCM_RATE_16000,

			.formats = SNDRV_PCM_FMTBIT_S16_LE,

			.channels_min = 1,

			.channels_max = 8,

			.rate_min =     8000,

			.rate_max =     48000,

		},
@@ -975,6 +985,8 @@ static struct snd_soc_dai_driver q6afe_dais[] = { 
				 SNDRV_PCM_RATE_16000,

			.formats = SNDRV_PCM_FMTBIT_S16_LE |

				   SNDRV_PCM_FMTBIT_S24_LE,

			.channels_min = 1,

			.channels_max = 8,

			.rate_min =     8000,

			.rate_max =     48000,

		},
@@ -989,6 +1001,8 @@ static struct snd_soc_dai_driver q6afe_dais[] = { 
			.rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_8000 |

				 SNDRV_PCM_RATE_16000,

			.formats = SNDRV_PCM_FMTBIT_S16_LE,

			.channels_min = 1,

			.channels_max = 8,

			.rate_min =     8000,

			.rate_max =     48000,

		},
@@ -1004,6 +1018,8 @@ static struct snd_soc_dai_driver q6afe_dais[] = { 
				 SNDRV_PCM_RATE_16000,

			.formats = SNDRV_PCM_FMTBIT_S16_LE |

				   SNDRV_PCM_FMTBIT_S24_LE,

			.channels_min = 1,

			.channels_max = 8,

			.rate_min =     8000,

			.rate_max =     48000,

		},

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