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mt7621 SoC has its own 'ralink_soc_info' structure with some information about the soc itself. Pcie controller and pcie phy drivers for this soc which are still in staging git tree make uses of 'soc_device_attribute' looking for revision 'E2' in order to know if reset lines are or not inverted. This way of doing things seems to be necessary in order to make things clean and properly. Hence, introduce this 'soc_device' to be able to properly use those attributes in drivers. Also set 'data' pointer points to the struct 'ralink_soc_info' to be able to export also current soc information using this mechanism. Cc: Paul Burton <paul.burton@mips.com> Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: john@phrozen.org Cc: NeilBrown <neil@brown.name> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-mips@vger.kernel.org Signed-off-by:Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by:
Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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