MIPS: Add CPU identifiers for more OCTEON family members. (71a8b7d8) · Commits · 戴 / test

Needed to support new SOCs. Signed-off-by:

arch/mips/include/asm/cpu.h

+4 −1

Original line number	Diff line number	Diff line
		@@ -141,6 +141,9 @@
		#define PRID_IMP_CAVIUM_CN68XX 0x9100
		#define PRID_IMP_CAVIUM_CN66XX 0x9200
		#define PRID_IMP_CAVIUM_CN61XX 0x9300
		#define PRID_IMP_CAVIUM_CNF71XX 0x9400
		#define PRID_IMP_CAVIUM_CN78XX 0x9500
		#define PRID_IMP_CAVIUM_CN70XX 0x9600

		/*
		* These are the PRID's for when 23:16 == PRID_COMP_INGENIC
		@@ -272,7 +275,7 @@ enum cpu_type_enum {
		*/
		CPU_5KC, CPU_5KE, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
		CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2,
		CPU_XLR, CPU_XLP,
		CPU_CAVIUM_OCTEON3, CPU_XLR, CPU_XLP,

		CPU_LAST
		};