Commit 718987d6 authored by Len Brown's avatar Len Brown
Browse files

intel_idle: support Bay Trail 



Bay Trail (BYT) is a family of Silvermont-core Atom Processor SOCs,
including the Intel Atom Processor Z36xxx and Z37xxx Series.

Although it shares the Silvermont core with Avoton,
BYT is optimized for mobile, and thus it supports
different power saving CPU idle states.

Note that not all versions of Bay Trail HW support all
of the states listed in the driver.

Signed-off-by: default avatarLen Brown <len.brown@intel.com>
Tested-by: default avatarAubrey Li <aubrey.li@linux.intel.com>
parent 24bfa950

drivers/idle/intel_idle.c

+53 −0
Original line number Diff line number Diff line
@@ -196,6 +196,53 @@ static struct cpuidle_state snb_cstates[] = { 
		.enter = NULL }

};



static struct cpuidle_state byt_cstates[] = {

	{

		.name = "C1-BYT",

		.desc = "MWAIT 0x00",

		.flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,

		.exit_latency = 1,

		.target_residency = 1,

		.enter = &intel_idle },

	{

		.name = "C1E-BYT",

		.desc = "MWAIT 0x01",

		.flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,

		.exit_latency = 15,

		.target_residency = 30,

		.enter = &intel_idle },

	{

		.name = "C6N-BYT",

		.desc = "MWAIT 0x58",

		.flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,

		.exit_latency = 40,

		.target_residency = 275,

		.enter = &intel_idle },

	{

		.name = "C6S-BYT",

		.desc = "MWAIT 0x52",

		.flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,

		.exit_latency = 140,

		.target_residency = 560,

		.enter = &intel_idle },

	{

		.name = "C7-BYT",

		.desc = "MWAIT 0x60",

		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,

		.exit_latency = 1200,

		.target_residency = 1500,

		.enter = &intel_idle },

	{

		.name = "C7S-BYT",

		.desc = "MWAIT 0x64",

		.flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,

		.exit_latency = 10000,

		.target_residency = 20000,

		.enter = &intel_idle },

	{

		.enter = NULL }

};



static struct cpuidle_state ivb_cstates[] = {

	{

		.name = "C1-IVB",
@@ -464,6 +511,11 @@ static const struct idle_cpu idle_cpu_snb = { 
	.disable_promotion_to_c1e = true,

};



static const struct idle_cpu idle_cpu_byt = {

	.state_table = byt_cstates,

	.disable_promotion_to_c1e = true,

};



static const struct idle_cpu idle_cpu_ivb = {

	.state_table = ivb_cstates,

	.disable_promotion_to_c1e = true,
@@ -494,6 +546,7 @@ static const struct x86_cpu_id intel_idle_ids[] = { 
	ICPU(0x2f, idle_cpu_nehalem),

	ICPU(0x2a, idle_cpu_snb),

	ICPU(0x2d, idle_cpu_snb),

	ICPU(0x37, idle_cpu_byt),

	ICPU(0x3a, idle_cpu_ivb),

	ICPU(0x3e, idle_cpu_ivb),

	ICPU(0x3c, idle_cpu_hsw),

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