RDMA/hns: Replace __raw_write*(cpu_to_le*()) with LE write*() (71591d12) · Commits · 戴 / test

There is no need to repeat the semantics of writel() and similar. Moreover sparse complains about this: drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1690:22: expected unsigned long long val drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1690:22: got restricted __le64 <noident> Fixing this by replacing __raw_write*(cpu_to_le*()) calls by plain write*() ones. Note, write*() accessors are little endian by definition. Reported-by:

kbuild test robot <fengguang.wu@intel.com> Signed-off-by:

Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:

Jason Gunthorpe <jgg@mellanox.com>

drivers/infiniband/hw/hns/hns_roce_hw_v1.c

+4 −4

Original line number	Diff line number	Diff line
		@@ -1687,13 +1687,13 @@ static int hns_roce_v1_post_mbox(struct hns_roce_dev *hr_dev, u64 in_param,
		roce_set_field(val, ROCEE_MB6_ROCEE_MB_TOKEN_M,
		ROCEE_MB6_ROCEE_MB_TOKEN_S, token);

		__raw_writeq(cpu_to_le64(in_param), hcr + 0);
		__raw_writeq(cpu_to_le64(out_param), hcr + 2);
		__raw_writel(cpu_to_le32(in_modifier), hcr + 4);
		writeq(in_param, hcr + 0);
		writeq(out_param, hcr + 2);
		writel(in_modifier, hcr + 4);
		/* Memory barrier */
		wmb();

		__raw_writel(cpu_to_le32(val), hcr + 5);
		writel(val, hcr + 5);

		mmiowb();

drivers/infiniband/hw/hns/hns_roce_hw_v2.c

+4 −4

Original line number	Diff line number	Diff line
		@@ -1228,14 +1228,14 @@ static int hns_roce_v2_post_mbox(struct hns_roce_dev *hr_dev, u64 in_param,
		roce_set_field(val1, HNS_ROCE_VF_MB5_TOKEN_MASK,
		HNS_ROCE_VF_MB5_TOKEN_SHIFT, token);

		__raw_writeq(cpu_to_le64(in_param), hcr + 0);
		__raw_writeq(cpu_to_le64(out_param), hcr + 2);
		writeq(in_param, hcr + 0);
		writeq(out_param, hcr + 2);

		/* Memory barrier */
		wmb();

		__raw_writel(cpu_to_le32(val0), hcr + 4);
		__raw_writel(cpu_to_le32(val1), hcr + 5);
		writel(val0, hcr + 4);
		writel(val1, hcr + 5);

		mmiowb();

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