Commit 715286f5 authored by Dirk Behme's avatar Dirk Behme Committed by Geert Uytterhoeven
Browse files

clk: renesas: r8a7796: Add RPC clocks 



Describe the RPCSRC internal clock and the RPC[D2] clocks derived from
it, as well as the RPC-IF module clock, in the R-Car M3-W/M3-W+
(R8A7796) CPG/MSSR driver.

Inspired by commit 94e3935b ("clk: renesas: r8a77980: Add RPC clocks").

Signed-off-by: default avatarDirk Behme <dirk.behme@de.bosch.com>
Link: https://lore.kernel.org/r/20200203072901.31548-2-dirk.behme@de.bosch.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 9e6f3b44

drivers/clk/renesas/r8a7796-cpg-mssr.c

+8 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ enum clk_ids { 
	CLK_S3,

	CLK_SDSRC,

	CLK_SSPSRC,

	CLK_RPCSRC,

	CLK_RINT,



	/* Module Clocks */
@@ -72,6 +73,12 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { 
	DEF_FIXED(".s2",        CLK_S2,            CLK_PLL1_DIV2,  4, 1),

	DEF_FIXED(".s3",        CLK_S3,            CLK_PLL1_DIV2,  6, 1),

	DEF_FIXED(".sdsrc",     CLK_SDSRC,         CLK_PLL1_DIV2,  2, 1),

	DEF_BASE(".rpcsrc",	CLK_RPCSRC, CLK_TYPE_GEN3_RPCSRC, CLK_PLL1),



	DEF_BASE("rpc",		R8A7796_CLK_RPC, CLK_TYPE_GEN3_RPC,

		 CLK_RPCSRC),

	DEF_BASE("rpcd2",	R8A7796_CLK_RPCD2, CLK_TYPE_GEN3_RPCD2,

		 R8A7796_CLK_RPC),



	DEF_GEN3_OSC(".r",      CLK_RINT,          CLK_EXTAL,      32),
@@ -217,6 +224,7 @@ static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = { 
	DEF_MOD("can-fd",		 914,	R8A7796_CLK_S3D2),

	DEF_MOD("can-if1",		 915,	R8A7796_CLK_S3D4),

	DEF_MOD("can-if0",		 916,	R8A7796_CLK_S3D4),

	DEF_MOD("rpc-if",		 917,	R8A7796_CLK_RPCD2),

	DEF_MOD("i2c6",			 918,	R8A7796_CLK_S0D6),

	DEF_MOD("i2c5",			 919,	R8A7796_CLK_S0D6),

	DEF_MOD("i2c-dvfs",		 926,	R8A7796_CLK_CP),

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