mlxsw: reg: Add QoS PTP Shaper Configuration Register (71147506) · Commits · 戴 / test

drivers/net/ethernet/mellanox/mlxsw/reg.h

+107 −0

Original line number	Diff line number	Diff line
		@@ -3836,6 +3836,112 @@ mlxsw_reg_qtctm_pack(char *payload, u8 local_port, bool mc)
		mlxsw_reg_qtctm_mc_set(payload, mc);
		}

		/* QPSC - QoS PTP Shaper Configuration Register
		* --------------------------------------------
		* The QPSC allows advanced configuration of the shapers when QEEC.ptps=1.
		* Supported only on Spectrum-1.
		*/
		#define MLXSW_REG_QPSC_ID 0x401B
		#define MLXSW_REG_QPSC_LEN 0x28

		MLXSW_REG_DEFINE(qpsc, MLXSW_REG_QPSC_ID, MLXSW_REG_QPSC_LEN);

		enum mlxsw_reg_qpsc_port_speed {
		MLXSW_REG_QPSC_PORT_SPEED_100M,
		MLXSW_REG_QPSC_PORT_SPEED_1G,
		MLXSW_REG_QPSC_PORT_SPEED_10G,
		MLXSW_REG_QPSC_PORT_SPEED_25G,
		};

		/* reg_qpsc_port_speed
		* Port speed.
		* Access: Index
		*/
		MLXSW_ITEM32(reg, qpsc, port_speed, 0x00, 0, 4);

		/* reg_qpsc_shaper_time_exp
		* The base-time-interval for updating the shapers tokens (for all hierarchies).
		* shaper_update_rate = 2 ^ shaper_time_exp * (1 + shaper_time_mantissa) * 32nSec
		* shaper_rate = 64bit * shaper_inc / shaper_update_rate
		* Access: RW
		*/
		MLXSW_ITEM32(reg, qpsc, shaper_time_exp, 0x04, 16, 4);

		/* reg_qpsc_shaper_time_mantissa
		* The base-time-interval for updating the shapers tokens (for all hierarchies).
		* shaper_update_rate = 2 ^ shaper_time_exp * (1 + shaper_time_mantissa) * 32nSec
		* shaper_rate = 64bit * shaper_inc / shaper_update_rate
		* Access: RW
		*/
		MLXSW_ITEM32(reg, qpsc, shaper_time_mantissa, 0x04, 0, 5);

		/* reg_qpsc_shaper_inc
		* Number of tokens added to shaper on each update.
		* Units of 8B.
		* Access: RW
		*/
		MLXSW_ITEM32(reg, qpsc, shaper_inc, 0x08, 0, 5);

		/* reg_qpsc_shaper_bs
		* Max shaper Burst size.
		* Burst size is 2 ^ max_shaper_bs * 512 [bits]
		* Range is: 5..25 (from 2KB..2GB)
		* Access: RW
		*/
		MLXSW_ITEM32(reg, qpsc, shaper_bs, 0x0C, 0, 6);

		/* reg_qpsc_ptsc_we
		* Write enable to port_to_shaper_credits.
		* Access: WO
		*/
		MLXSW_ITEM32(reg, qpsc, ptsc_we, 0x10, 31, 1);

		/* reg_qpsc_port_to_shaper_credits
		* For split ports: range 1..57
		* For non-split ports: range 1..112
		* Written only when ptsc_we is set.
		* Access: RW
		*/
		MLXSW_ITEM32(reg, qpsc, port_to_shaper_credits, 0x10, 0, 8);

		/* reg_qpsc_ing_timestamp_inc
		* Ingress timestamp increment.
		* 2's complement.
		* The timestamp of MTPPTR at ingress will be incremented by this value. Global
		* value for all ports.
		* Same units as used by MTPPTR.
		* Access: RW
		*/
		MLXSW_ITEM32(reg, qpsc, ing_timestamp_inc, 0x20, 0, 32);

		/* reg_qpsc_egr_timestamp_inc
		* Egress timestamp increment.
		* 2's complement.
		* The timestamp of MTPPTR at egress will be incremented by this value. Global
		* value for all ports.
		* Same units as used by MTPPTR.
		* Access: RW
		*/
		MLXSW_ITEM32(reg, qpsc, egr_timestamp_inc, 0x24, 0, 32);

		static inline void
		mlxsw_reg_qpsc_pack(char *payload, enum mlxsw_reg_qpsc_port_speed port_speed,
		u8 shaper_time_exp, u8 shaper_time_mantissa, u8 shaper_inc,
		u8 shaper_bs, u8 port_to_shaper_credits,
		int ing_timestamp_inc, int egr_timestamp_inc)
		{
		MLXSW_REG_ZERO(qpsc, payload);
		mlxsw_reg_qpsc_port_speed_set(payload, port_speed);
		mlxsw_reg_qpsc_shaper_time_exp_set(payload, shaper_time_exp);
		mlxsw_reg_qpsc_shaper_time_mantissa_set(payload, shaper_time_mantissa);
		mlxsw_reg_qpsc_shaper_inc_set(payload, shaper_inc);
		mlxsw_reg_qpsc_shaper_bs_set(payload, shaper_bs);
		mlxsw_reg_qpsc_ptsc_we_set(payload, true);
		mlxsw_reg_qpsc_port_to_shaper_credits_set(payload, port_to_shaper_credits);
		mlxsw_reg_qpsc_ing_timestamp_inc_set(payload, ing_timestamp_inc);
		mlxsw_reg_qpsc_egr_timestamp_inc_set(payload, egr_timestamp_inc);
		}

		/* PMLP - Ports Module to Local Port Register
		* ------------------------------------------
		* Configures the assignment of modules to local ports.
		@@ -10396,6 +10502,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
		MLXSW_REG(qpdsm),
		MLXSW_REG(qpdpm),
		MLXSW_REG(qtctm),
		MLXSW_REG(qpsc),
		MLXSW_REG(pmlp),
		MLXSW_REG(pmtu),
		MLXSW_REG(ptys),

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