Commit 70e31424 authored Jan 09, 2019 by Daniele Ceraolo Spurio Committed by Jani Nikula Jan 10, 2019

drm/i915: init per-engine WAs for all engines



commit 4a15c75c ("drm/i915: Introduce per-engine workarounds")
refactored the workaround code to have functions per-engine, but didn't
call any of them from logical_xcs_ring_init. Since we do have a non-RCS
workaround for KBL (WaKBLVECSSemaphoreWaitPoll) we do need to call
intel_engine_init_workarounds for non-RCS engines.
Note that whitelist is still RCS-only.

v2: move the call to logical_ring_init (Chris)

Fixes: 4a15c75c ("drm/i915: Introduce per-engine workarounds")
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190110013232.8972-2-daniele.ceraolospurio@intel.com


(cherry picked from commit a60acb22)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

parent 280d479b

drivers/gpu/drm/i915/intel_lrc.c

+2 −1

Original line number	Original line	Diff line number	Diff line
	@@ -2244,6 +2244,8 @@ static int logical_ring_init(struct intel_engine_cs *engine)
	if (ret)		if (ret)
	return ret;		return ret;

			intel_engine_init_workarounds(engine);

	if (HAS_LOGICAL_RING_ELSQ(i915)) {		if (HAS_LOGICAL_RING_ELSQ(i915)) {
	execlists->submit_reg = i915->regs +		execlists->submit_reg = i915->regs +
	i915_mmio_reg_offset(RING_EXECLIST_SQ_CONTENTS(engine));		i915_mmio_reg_offset(RING_EXECLIST_SQ_CONTENTS(engine));
	@@ -2310,7 +2312,6 @@ int logical_render_ring_init(struct intel_engine_cs *engine)
	}		}

	intel_engine_init_whitelist(engine);		intel_engine_init_whitelist(engine);
	intel_engine_init_workarounds(engine);

	return 0;		return 0;
	}		}

Admin message