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This is no official errata, but I noticed that the channel reset may stop working if the DMA state engine is in the READ_FLUSH state. This patch uses the channel debug1 register to wait for the DMA statemachine to leave the READ_FLUSH state. After that we can continue to reset the channel. Tested on i.MX28. Signed-off-by:Markus Pargmann <mpa@pengutronix.de> Signed-off-by:
Vinod Koul <vinod.koul@intel.com>
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