Commit 6fd622c2 authored by Dilip Kota's avatar Dilip Kota Committed by Lorenzo Pieralisi
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PCI: artpec6: Configure FTS with dwc helper function 



Use DesignWare helper functions to configure Fast Training
Sequence. Drop the respective code in the driver.

Signed-off-by: default avatarDilip Kota <eswara.kota@linux.intel.com>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: default avatarAndrew Murray <andrew.murray@arm.com>
parent ed22aaae

drivers/pci/controller/dwc/pcie-artpec6.c

+1 −7
Original line number Diff line number Diff line
@@ -51,9 +51,6 @@ static const struct of_device_id artpec6_pcie_of_match[]; 
#define ACK_N_FTS_MASK			GENMASK(15, 8)

#define ACK_N_FTS(x)			(((x) << 8) & ACK_N_FTS_MASK)



#define FAST_TRAINING_SEQ_MASK		GENMASK(7, 0)

#define FAST_TRAINING_SEQ(x)		(((x) << 0) & FAST_TRAINING_SEQ_MASK)



/* ARTPEC-6 specific registers */

#define PCIECFG				0x18

#define  PCIECFG_DBG_OEN		BIT(24)
@@ -313,10 +310,7 @@ static void artpec6_pcie_set_nfts(struct artpec6_pcie *artpec6_pcie) 
	 * Set the Number of Fast Training Sequences that the core

	 * advertises as its N_FTS during Gen2 or Gen3 link training.

	 */

	val = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL);

	val &= ~FAST_TRAINING_SEQ_MASK;

	val |= FAST_TRAINING_SEQ(180);

	dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val);

	dw_pcie_link_set_n_fts(pci, 180);

}



static void artpec6_pcie_assert_core_reset(struct artpec6_pcie *artpec6_pcie)

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