Commit 6f39ef57 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'ux500-dma40-for-arm-soc' of... 

Merge tag 'ux500-dma40-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers

From Linus Walleij:
This is a set of patches from Lee Jones to start converting
the ux500 to fetch DMA channels from the device tree:
- Full DT support and channel mapping in the DMA40 driver
- Dropping of platform data for migrated devices on the DT
  boot path.

* tag 'ux500-dma40-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson

: (36 commits)
  ARM: ux500: Register Cryp and Hash platform drivers on Snowball
  crypto: ux500/[cryp|hash] - Show successful start-up in the bootlog
  ARM: ux500: Stop passing Cryp DMA channel config information though pdata
  crypto: ux500/cryp - Set DMA configuration though dma_slave_config()
  crypto: ux500/cryp - Prepare clock before enabling it
  ARM: ux500: Stop passing Hash DMA channel config information though pdata
  crypto: ux500/hash - Set DMA configuration though dma_slave_config()
  crypto: ux500/hash - Prepare clock before enabling it
  ARM: ux500: Remove unnecessary attributes from DMA channel request pdata
  dmaengine: ste_dma40: Correct copy/paste error
  ARM: ux500: Remove DMA address look-up table
  dmaengine: ste_dma40: Remove redundant address fetching function
  dmaengine: ste_dma40: Only use addresses passed as configuration information
  ARM: ux500: Stop passing UART's platform data for Device Tree boots
  dmaengine: ste_dma40: Don't configure runtime configurable setup during allocate
  dmaengine: ste_dma40: Remove unnecessary call to d40_phy_cfg()
  dmaengine: ste_dma40: Separate Logical Global Interrupt Mask (GIM) unmasking
  ARM: ux500: Pass remnant platform data though to DMA40 driver
  dmaengine: ste_dma40: Supply full Device Tree parsing support
  dmaengine: ste_dma40: Allow driver to be probe()able when DT is enabled
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents e4aa937e 95e4bf98

Documentation/devicetree/bindings/dma/ste-dma40.txt

0 → 100644
+62 −0
Original line number Diff line number Diff line 
* DMA40 DMA Controller



Required properties:

- compatible: "stericsson,dma40"

- reg: Address range of the DMAC registers

- reg-names: Names of the above areas to use during resource look-up

- interrupt: Should contain the DMAC interrupt number

- #dma-cells: must be <3>



Optional properties:

- dma-channels: Number of channels supported by hardware - if not present

		the driver will attempt to obtain the information from H/W



Example:



	dma: dma-controller@801C0000 {

		compatible = "stericsson,db8500-dma40", "stericsson,dma40";

		reg = <0x801C0000 0x1000  0x40010000 0x800>;

		reg-names = "base", "lcpa";

		interrupt-parent = <&intc>;

		interrupts = <0 25 0x4>;



		#dma-cells = <2>;

		dma-channels = <8>;

	};



Clients

Required properties:

- dmas: Comma separated list of dma channel requests

- dma-names: Names of the aforementioned requested channels



Each dmas request consists of 4 cells:

  1. A phandle pointing to the DMA controller

  2. Device Type

  3. The DMA request line number (only when 'use fixed channel' is set)

  4. A 32bit mask specifying; mode, direction and endianess [NB: This list will grow]

        0x00000001: Mode:

                Logical channel when unset

                Physical channel when set

        0x00000002: Direction:

                Memory to Device when unset

                Device to Memory when set

        0x00000004: Endianess:

                Little endian when unset

                Big endian when set

        0x00000008: Use fixed channel:

                Use automatic channel selection when unset

                Use DMA request line number when set



Example:



	uart@80120000 {

		compatible = "arm,pl011", "arm,primecell";

		reg = <0x80120000 0x1000>;

		interrupts = <0 11 0x4>;



		dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */

		       <&dma 13 0 0x0>; /* Logical - MemToDev */

		dma-names = "rx", "rx";



		status = "disabled";

	};

arch/arm/mach-ux500/board-mop500-audio.c

+6 −50
Original line number Diff line number Diff line
@@ -22,27 +22,13 @@ 
static struct stedma40_chan_cfg msp0_dma_rx = {

	.high_priority = true,

	.dir = STEDMA40_PERIPH_TO_MEM,



	.src_dev_type = DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX,

	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,



	.src_info.psize = STEDMA40_PSIZE_LOG_4,

	.dst_info.psize = STEDMA40_PSIZE_LOG_4,



	/* data_width is set during configuration */

	.dev_type = DB8500_DMA_DEV31_MSP0_SLIM0_CH0,

};



static struct stedma40_chan_cfg msp0_dma_tx = {

	.high_priority = true,

	.dir = STEDMA40_MEM_TO_PERIPH,



	.src_dev_type = STEDMA40_DEV_DST_MEMORY,

	.dst_dev_type = DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX,



	.src_info.psize = STEDMA40_PSIZE_LOG_4,

	.dst_info.psize = STEDMA40_PSIZE_LOG_4,



	/* data_width is set during configuration */

	.dev_type = DB8500_DMA_DEV31_MSP0_SLIM0_CH0,

};



struct msp_i2s_platform_data msp0_platform_data = {
@@ -54,27 +40,13 @@ struct msp_i2s_platform_data msp0_platform_data = { 
static struct stedma40_chan_cfg msp1_dma_rx = {

	.high_priority = true,

	.dir = STEDMA40_PERIPH_TO_MEM,



	.src_dev_type = DB8500_DMA_DEV30_MSP3_RX,

	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,



	.src_info.psize = STEDMA40_PSIZE_LOG_4,

	.dst_info.psize = STEDMA40_PSIZE_LOG_4,



	/* data_width is set during configuration */

	.dev_type = DB8500_DMA_DEV30_MSP3,

};



static struct stedma40_chan_cfg msp1_dma_tx = {

	.high_priority = true,

	.dir = STEDMA40_MEM_TO_PERIPH,



	.src_dev_type = STEDMA40_DEV_DST_MEMORY,

	.dst_dev_type = DB8500_DMA_DEV30_MSP1_TX,



	.src_info.psize = STEDMA40_PSIZE_LOG_4,

	.dst_info.psize = STEDMA40_PSIZE_LOG_4,



	/* data_width is set during configuration */

	.dev_type = DB8500_DMA_DEV30_MSP1,

};



struct msp_i2s_platform_data msp1_platform_data = {
@@ -86,31 +58,15 @@ struct msp_i2s_platform_data msp1_platform_data = { 
static struct stedma40_chan_cfg msp2_dma_rx = {

	.high_priority = true,

	.dir = STEDMA40_PERIPH_TO_MEM,



	.src_dev_type = DB8500_DMA_DEV14_MSP2_RX,

	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,



	/* MSP2 DMA doesn't work with PSIZE == 4 on DB8500v2 */

	.src_info.psize = STEDMA40_PSIZE_LOG_1,

	.dst_info.psize = STEDMA40_PSIZE_LOG_1,



	/* data_width is set during configuration */

	.dev_type = DB8500_DMA_DEV14_MSP2,

};



static struct stedma40_chan_cfg msp2_dma_tx = {

	.high_priority = true,

	.dir = STEDMA40_MEM_TO_PERIPH,



	.src_dev_type = STEDMA40_DEV_DST_MEMORY,

	.dst_dev_type = DB8500_DMA_DEV14_MSP2_TX,



	.src_info.psize = STEDMA40_PSIZE_LOG_4,

	.dst_info.psize = STEDMA40_PSIZE_LOG_4,



	.dev_type = DB8500_DMA_DEV14_MSP2,

	.use_fixed_channel = true,

	.phy_channel = 1,



	/* data_width is set during configuration */

};



static struct platform_device *db8500_add_msp_i2s(struct device *parent,

arch/arm/mach-ux500/board-mop500-sdi.c

+8 −32
Original line number Diff line number Diff line
@@ -35,19 +35,13 @@ 
struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_PERIPH_TO_MEM,

	.src_dev_type = DB8500_DMA_DEV29_SD_MM0_RX,

	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,

	.src_info.data_width = STEDMA40_WORD_WIDTH,

	.dst_info.data_width = STEDMA40_WORD_WIDTH,

	.dev_type = DB8500_DMA_DEV29_SD_MM0,

};



static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_MEM_TO_PERIPH,

	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,

	.dst_dev_type = DB8500_DMA_DEV29_SD_MM0_TX,

	.src_info.data_width = STEDMA40_WORD_WIDTH,

	.dst_info.data_width = STEDMA40_WORD_WIDTH,

	.dev_type = DB8500_DMA_DEV29_SD_MM0,

};

#endif
@@ -88,19 +82,13 @@ void mop500_sdi_tc35892_init(struct device *parent) 
static struct stedma40_chan_cfg sdi1_dma_cfg_rx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_PERIPH_TO_MEM,

	.src_dev_type = DB8500_DMA_DEV32_SD_MM1_RX,

	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,

	.src_info.data_width = STEDMA40_WORD_WIDTH,

	.dst_info.data_width = STEDMA40_WORD_WIDTH,

	.dev_type = DB8500_DMA_DEV32_SD_MM1,

};



static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_MEM_TO_PERIPH,

	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,

	.dst_dev_type = DB8500_DMA_DEV32_SD_MM1_TX,

	.src_info.data_width = STEDMA40_WORD_WIDTH,

	.dst_info.data_width = STEDMA40_WORD_WIDTH,

	.dev_type = DB8500_DMA_DEV32_SD_MM1,

};

#endif
@@ -125,19 +113,13 @@ struct mmci_platform_data mop500_sdi1_data = { 
struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_PERIPH_TO_MEM,

	.src_dev_type =  DB8500_DMA_DEV28_SD_MM2_RX,

	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,

	.src_info.data_width = STEDMA40_WORD_WIDTH,

	.dst_info.data_width = STEDMA40_WORD_WIDTH,

	.dev_type =  DB8500_DMA_DEV28_SD_MM2,

};



static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_MEM_TO_PERIPH,

	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,

	.dst_dev_type = DB8500_DMA_DEV28_SD_MM2_TX,

	.src_info.data_width = STEDMA40_WORD_WIDTH,

	.dst_info.data_width = STEDMA40_WORD_WIDTH,

	.dev_type = DB8500_DMA_DEV28_SD_MM2,

};

#endif
@@ -163,19 +145,13 @@ struct mmci_platform_data mop500_sdi2_data = { 
struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_PERIPH_TO_MEM,

	.src_dev_type =  DB8500_DMA_DEV42_SD_MM4_RX,

	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,

	.src_info.data_width = STEDMA40_WORD_WIDTH,

	.dst_info.data_width = STEDMA40_WORD_WIDTH,

	.dev_type =  DB8500_DMA_DEV42_SD_MM4,

};



static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_MEM_TO_PERIPH,

	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,

	.dst_dev_type = DB8500_DMA_DEV42_SD_MM4_TX,

	.src_info.data_width = STEDMA40_WORD_WIDTH,

	.dst_info.data_width = STEDMA40_WORD_WIDTH,

	.dev_type = DB8500_DMA_DEV42_SD_MM4,

};

#endif

arch/arm/mach-ux500/board-mop500.c

+13 −50
Original line number Diff line number Diff line
@@ -425,35 +425,20 @@ void mop500_snowball_ethernet_clock_enable(void) 
static struct cryp_platform_data u8500_cryp1_platform_data = {

		.mem_to_engine = {

				.dir = STEDMA40_MEM_TO_PERIPH,

				.src_dev_type = STEDMA40_DEV_SRC_MEMORY,

				.dst_dev_type = DB8500_DMA_DEV48_CAC1_TX,

				.src_info.data_width = STEDMA40_WORD_WIDTH,

				.dst_info.data_width = STEDMA40_WORD_WIDTH,

				.dev_type = DB8500_DMA_DEV48_CAC1,

				.mode = STEDMA40_MODE_LOGICAL,

				.src_info.psize = STEDMA40_PSIZE_LOG_4,

				.dst_info.psize = STEDMA40_PSIZE_LOG_4,

		},

		.engine_to_mem = {

				.dir = STEDMA40_PERIPH_TO_MEM,

				.src_dev_type = DB8500_DMA_DEV48_CAC1_RX,

				.dst_dev_type = STEDMA40_DEV_DST_MEMORY,

				.src_info.data_width = STEDMA40_WORD_WIDTH,

				.dst_info.data_width = STEDMA40_WORD_WIDTH,

				.dev_type = DB8500_DMA_DEV48_CAC1,

				.mode = STEDMA40_MODE_LOGICAL,

				.src_info.psize = STEDMA40_PSIZE_LOG_4,

				.dst_info.psize = STEDMA40_PSIZE_LOG_4,

		}

};



static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = {

		.dir = STEDMA40_MEM_TO_PERIPH,

		.src_dev_type = STEDMA40_DEV_SRC_MEMORY,

		.dst_dev_type = DB8500_DMA_DEV50_HAC1_TX,

		.src_info.data_width = STEDMA40_WORD_WIDTH,

		.dst_info.data_width = STEDMA40_WORD_WIDTH,

		.dev_type = DB8500_DMA_DEV50_HAC1_TX,

		.mode = STEDMA40_MODE_LOGICAL,

		.src_info.psize = STEDMA40_PSIZE_LOG_16,

		.dst_info.psize = STEDMA40_PSIZE_LOG_16,

};



static struct hash_platform_data u8500_hash1_platform_data = {
@@ -471,19 +456,13 @@ static struct platform_device *mop500_platform_devs[] __initdata = { 
static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_PERIPH_TO_MEM,

	.src_dev_type =  DB8500_DMA_DEV8_SSP0_RX,

	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,

	.src_info.data_width = STEDMA40_BYTE_WIDTH,

	.dst_info.data_width = STEDMA40_BYTE_WIDTH,

	.dev_type = DB8500_DMA_DEV8_SSP0,

};



static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_MEM_TO_PERIPH,

	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,

	.dst_dev_type = DB8500_DMA_DEV8_SSP0_TX,

	.src_info.data_width = STEDMA40_BYTE_WIDTH,

	.dst_info.data_width = STEDMA40_BYTE_WIDTH,

	.dev_type = DB8500_DMA_DEV8_SSP0,

};

#endif
@@ -512,55 +491,37 @@ static void __init mop500_spi_init(struct device *parent) 
static struct stedma40_chan_cfg uart0_dma_cfg_rx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_PERIPH_TO_MEM,

	.src_dev_type =  DB8500_DMA_DEV13_UART0_RX,

	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,

	.src_info.data_width = STEDMA40_BYTE_WIDTH,

	.dst_info.data_width = STEDMA40_BYTE_WIDTH,

	.dev_type = DB8500_DMA_DEV13_UART0,

};



static struct stedma40_chan_cfg uart0_dma_cfg_tx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_MEM_TO_PERIPH,

	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,

	.dst_dev_type = DB8500_DMA_DEV13_UART0_TX,

	.src_info.data_width = STEDMA40_BYTE_WIDTH,

	.dst_info.data_width = STEDMA40_BYTE_WIDTH,

	.dev_type = DB8500_DMA_DEV13_UART0,

};



static struct stedma40_chan_cfg uart1_dma_cfg_rx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_PERIPH_TO_MEM,

	.src_dev_type =  DB8500_DMA_DEV12_UART1_RX,

	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,

	.src_info.data_width = STEDMA40_BYTE_WIDTH,

	.dst_info.data_width = STEDMA40_BYTE_WIDTH,

	.dev_type = DB8500_DMA_DEV12_UART1,

};



static struct stedma40_chan_cfg uart1_dma_cfg_tx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_MEM_TO_PERIPH,

	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,

	.dst_dev_type = DB8500_DMA_DEV12_UART1_TX,

	.src_info.data_width = STEDMA40_BYTE_WIDTH,

	.dst_info.data_width = STEDMA40_BYTE_WIDTH,

	.dev_type = DB8500_DMA_DEV12_UART1,

};



static struct stedma40_chan_cfg uart2_dma_cfg_rx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_PERIPH_TO_MEM,

	.src_dev_type =  DB8500_DMA_DEV11_UART2_RX,

	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,

	.src_info.data_width = STEDMA40_BYTE_WIDTH,

	.dst_info.data_width = STEDMA40_BYTE_WIDTH,

	.dev_type = DB8500_DMA_DEV11_UART2,

};



static struct stedma40_chan_cfg uart2_dma_cfg_tx = {

	.mode = STEDMA40_MODE_LOGICAL,

	.dir = STEDMA40_MEM_TO_PERIPH,

	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,

	.dst_dev_type = DB8500_DMA_DEV11_UART2_TX,

	.src_info.data_width = STEDMA40_BYTE_WIDTH,

	.dst_info.data_width = STEDMA40_BYTE_WIDTH,

	.dev_type = DB8500_DMA_DEV11_UART2,

};

#endif
@@ -676,6 +637,8 @@ static void __init snowball_init_machine(void) 


	mop500_snowball_ethernet_clock_enable();



	u8500_cryp1_hash1_init(parent);



	/* This board has full regulator constraints */

	regulator_has_full_constraints();

}

arch/arm/mach-ux500/board-mop500.h

+1 −0
Original line number Diff line number Diff line
@@ -93,6 +93,7 @@ extern struct amba_pl011_data uart0_plat; 
extern struct amba_pl011_data uart1_plat;

extern struct amba_pl011_data uart2_plat;

extern struct pl022_ssp_controller ssp0_plat;

extern struct stedma40_platform_data dma40_plat_data;



extern void mop500_sdi_init(struct device *parent);

extern void snowball_sdi_init(struct device *parent);

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