Commit 6f223a3d authored by Stanislaw Gruszka's avatar Stanislaw Gruszka Committed by Felix Fietkau
Browse files

mt76x0: correct RF access via RF_CSR register. 



PCIe version don't use MCU for RF registers access. We need
to correct RF CSR method to support up to 127 RF registers.

Signed-off-by: default avatarStanislaw Gruszka <sgruszka@redhat.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent bed25905

drivers/net/wireless/mediatek/mt76/mt76x0/phy.c

+2 −4
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ mt76x0_rf_csr_wr(struct mt76x02_dev *dev, u32 offset, u8 value) 
	bank = MT_RF_BANK(offset);

	reg = MT_RF_REG(offset);



	if (WARN_ON_ONCE(reg > 64) || WARN_ON_ONCE(bank) > 8)

	if (WARN_ON_ONCE(reg > 127) || WARN_ON_ONCE(bank) > 8)

		return -EINVAL;



	mutex_lock(&dev->phy_mutex);
@@ -76,7 +76,7 @@ static int mt76x0_rf_csr_rr(struct mt76x02_dev *dev, u32 offset) 
	bank = MT_RF_BANK(offset);

	reg = MT_RF_REG(offset);



	if (WARN_ON_ONCE(reg > 64) || WARN_ON_ONCE(bank) > 8)

	if (WARN_ON_ONCE(reg > 127) || WARN_ON_ONCE(bank) > 8)

		return -EINVAL;



	mutex_lock(&dev->phy_mutex);
@@ -119,7 +119,6 @@ rf_wr(struct mt76x02_dev *dev, u32 offset, u8 val) 


		return mt76_wr_rp(dev, MT_MCU_MEMMAP_RF, &pair, 1);

	} else {

		WARN_ON_ONCE(1);

		return mt76x0_rf_csr_wr(dev, offset, val);

	}

}
@@ -138,7 +137,6 @@ rf_rr(struct mt76x02_dev *dev, u32 offset) 
		ret = mt76_rd_rp(dev, MT_MCU_MEMMAP_RF, &pair, 1);

		val = pair.value;

	} else {

		WARN_ON_ONCE(1);

		ret = val = mt76x0_rf_csr_rr(dev, offset);

	}

drivers/net/wireless/mediatek/mt76/mt76x02_regs.h

+2 −2
Original line number Diff line number Diff line
@@ -205,8 +205,8 @@ 
#define MT_TXQ_STA			0x0434

#define	MT_RF_CSR_CFG			0x0500

#define MT_RF_CSR_CFG_DATA		GENMASK(7, 0)

#define MT_RF_CSR_CFG_REG_ID		GENMASK(13, 8)

#define MT_RF_CSR_CFG_REG_BANK		GENMASK(17, 14)

#define MT_RF_CSR_CFG_REG_ID		GENMASK(14, 8)

#define MT_RF_CSR_CFG_REG_BANK		GENMASK(17, 15)

#define MT_RF_CSR_CFG_WR		BIT(30)

#define MT_RF_CSR_CFG_KICK		BIT(31)

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