Commit 6f163714 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

arm64: KVM: Handle PMCR_EL0.LC as RES1 on pure AArch64 systems 



Of PMCR_EL0.LC, the ARMv8 ARM says:

	"In an AArch64 only implementation, this field is RES 1."

So be it.

Fixes: ab946834 ("arm64: KVM: Add access handler for PMCR register")
Reviewed-by: default avatarAndrew Murray <andrew.murray@arm.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent f4e23cf9

arch/arm64/kvm/sys_regs.c

+4 −0
Original line number Diff line number Diff line
@@ -632,6 +632,8 @@ static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) 
	 */

	val = ((pmcr & ~ARMV8_PMU_PMCR_MASK)

	       | (ARMV8_PMU_PMCR_MASK & 0xdecafbad)) & (~ARMV8_PMU_PMCR_E);

	if (!system_supports_32bit_el0())

		val |= ARMV8_PMU_PMCR_LC;

	__vcpu_sys_reg(vcpu, r->reg) = val;

}
@@ -682,6 +684,8 @@ static bool access_pmcr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 
		val = __vcpu_sys_reg(vcpu, PMCR_EL0);

		val &= ~ARMV8_PMU_PMCR_MASK;

		val |= p->regval & ARMV8_PMU_PMCR_MASK;

		if (!system_supports_32bit_el0())

			val |= ARMV8_PMU_PMCR_LC;

		__vcpu_sys_reg(vcpu, PMCR_EL0) = val;

		kvm_pmu_handle_pmcr(vcpu, val);

		kvm_vcpu_pmu_restore_guest(vcpu);

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