Commit 6ec81b82 authored by Arnd Bergmann's avatar Arnd Bergmann Committed by Chris Wilson
Browse files

drm/i915/pmu: avoid an maybe-uninitialized warning 



Conditional spinlocks make it hard for gcc and for lockdep to
follow the code flow. This one causes a warning with at least
gcc-9 and higher:

In file included from include/linux/irq.h:14,
                 from drivers/gpu/drm/i915/i915_pmu.c:7:
drivers/gpu/drm/i915/i915_pmu.c: In function 'i915_sample':
include/linux/spinlock.h:289:3: error: 'flags' may be used uninitialized in this function [-Werror=maybe-uninitialized]
  289 |   _raw_spin_unlock_irqrestore(lock, flags); \
      |   ^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/i915_pmu.c:288:17: note: 'flags' was declared here
  288 |   unsigned long flags;
      |                 ^~~~~

Split out the part between the locks into a separate function
for readability and to let the compiler figure out what the
logic actually is.

Fixes: d79e1bd6 ("drm/i915/pmu: Only use exclusive mmio access for gen7")
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200527140526.1458215-1-arnd@arndb.de
parent 0109a16e

drivers/gpu/drm/i915/i915_pmu.c

+42 −42
Original line number Diff line number Diff line
@@ -269,39 +269,15 @@ static bool exclusive_mmio_access(const struct drm_i915_private *i915) 
	return IS_GEN(i915, 7);

}



static void

engines_sample(struct intel_gt *gt, unsigned int period_ns)

static void engine_sample(struct intel_engine_cs *engine, unsigned int period_ns)

{

	struct drm_i915_private *i915 = gt->i915;

	struct intel_engine_cs *engine;

	enum intel_engine_id id;



	if ((i915->pmu.enable & ENGINE_SAMPLE_MASK) == 0)

		return;



	if (!intel_gt_pm_is_awake(gt))

		return;



	for_each_engine(engine, gt, id) {

	struct intel_engine_pmu *pmu = &engine->pmu;

		spinlock_t *mmio_lock;

		unsigned long flags;

	bool busy;

	u32 val;



		if (!intel_engine_pm_get_if_awake(engine))

			continue;



		mmio_lock = NULL;

		if (exclusive_mmio_access(i915))

			mmio_lock = &engine->uncore->lock;



		if (unlikely(mmio_lock))

			spin_lock_irqsave(mmio_lock, flags);



	val = ENGINE_READ_FW(engine, RING_CTL);

	if (val == 0) /* powerwell off => engine idle */

			goto skip;

		return;



	if (val & RING_WAIT)

		add_sample(&pmu->sample[I915_SAMPLE_WAIT], period_ns);
@@ -310,7 +286,7 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns) 


	/* No need to sample when busy stats are supported. */

	if (intel_engine_supports_stats(engine))

			goto skip;

		return;



	/*

	 * While waiting on a semaphore or event, MI_MODE reports the
@@ -326,10 +302,34 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns) 
	}

	if (busy)

		add_sample(&pmu->sample[I915_SAMPLE_BUSY], period_ns);

}



static void

engines_sample(struct intel_gt *gt, unsigned int period_ns)

{

	struct drm_i915_private *i915 = gt->i915;

	struct intel_engine_cs *engine;

	enum intel_engine_id id;

	unsigned long flags;



	if ((i915->pmu.enable & ENGINE_SAMPLE_MASK) == 0)

		return;



	if (!intel_gt_pm_is_awake(gt))

		return;



	for_each_engine(engine, gt, id) {

		if (!intel_engine_pm_get_if_awake(engine))

			continue;



		if (exclusive_mmio_access(i915)) {

			spin_lock_irqsave(&engine->uncore->lock, flags);

			engine_sample(engine, period_ns);

			spin_unlock_irqrestore(&engine->uncore->lock, flags);

		} else {

			engine_sample(engine, period_ns);

		}



skip:

		if (unlikely(mmio_lock))

			spin_unlock_irqrestore(mmio_lock, flags);

		intel_engine_pm_put_async(engine);

	}

}

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