Commit 6e9e286e authored by Yevgeny Kliteynik's avatar Yevgeny Kliteynik Committed by Saeed Mahameed
Browse files

net/mlx5: DR, Refactor VXLAN GPE flex parser tunnel code for SW steering 



Refactor flex parser tunnel code:
 - Add definition for flex parser tunneling header for VXLAN-GPE
 - Use macros for VXLAN-GPE SW steering when building STE
 - Refactor the code to reflect that this is a VXLAN GPE
   only code and not a general flex parser code.
   This also significantly simplifies addition of more
   flex parser protocols, such as Geneve.

Signed-off-by: default avatarYevgeny Kliteynik <kliteyn@mellanox.com>
Reviewed-by: default avatarAlex Vesker <valex@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent ab118da4

drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c

+21 −12
Original line number Original line Diff line number Diff line
@@ -102,13 +102,29 @@ static bool dr_mask_is_gre_set(struct mlx5dr_match_misc *misc) 
	DR_MASK_IS_OUTER_MPLS_OVER_GRE_UDP_SET((_misc2), gre) || \

	DR_MASK_IS_OUTER_MPLS_OVER_GRE_UDP_SET((_misc2), gre) || \

	DR_MASK_IS_OUTER_MPLS_OVER_GRE_UDP_SET((_misc2), udp))

	DR_MASK_IS_OUTER_MPLS_OVER_GRE_UDP_SET((_misc2), udp))





static bool dr_mask_is_flex_parser_tnl_set(struct mlx5dr_match_misc3 *misc3)

static bool

dr_mask_is_misc3_vxlan_gpe_set(struct mlx5dr_match_misc3 *misc3)

{

{

	return (misc3->outer_vxlan_gpe_vni ||

	return (misc3->outer_vxlan_gpe_vni ||

		misc3->outer_vxlan_gpe_next_protocol ||

		misc3->outer_vxlan_gpe_next_protocol ||

		misc3->outer_vxlan_gpe_flags);

		misc3->outer_vxlan_gpe_flags);

}

}





static bool

dr_matcher_supp_flex_parser_vxlan_gpe(struct mlx5dr_cmd_caps *caps)

{

	return caps->flex_protocols &

	       MLX5_FLEX_PARSER_VXLAN_GPE_ENABLED;

}



static bool

dr_mask_is_flex_parser_tnl_vxlan_gpe_set(struct mlx5dr_match_param *mask,

					 struct mlx5dr_domain *dmn)

{

	return dr_mask_is_misc3_vxlan_gpe_set(&mask->misc3) &&

	       dr_matcher_supp_flex_parser_vxlan_gpe(&dmn->info.caps);

}



static bool dr_mask_is_flex_parser_icmpv6_set(struct mlx5dr_match_misc3 *misc3)

static bool dr_mask_is_flex_parser_icmpv6_set(struct mlx5dr_match_misc3 *misc3)

{

{

	return (misc3->icmpv6_type || misc3->icmpv6_code ||

	return (misc3->icmpv6_type || misc3->icmpv6_code ||
@@ -137,13 +153,6 @@ static bool dr_mask_is_gvmi_or_qpn_set(struct mlx5dr_match_misc *misc) 
	return (misc->source_sqn || misc->source_port);

	return (misc->source_sqn || misc->source_port);

}

}





static bool

dr_matcher_supp_flex_parser_vxlan_gpe(struct mlx5dr_domain *dmn)

{

	return dmn->info.caps.flex_protocols &

	       MLX5_FLEX_PARSER_VXLAN_GPE_ENABLED;

}



int mlx5dr_matcher_select_builders(struct mlx5dr_matcher *matcher,

int mlx5dr_matcher_select_builders(struct mlx5dr_matcher *matcher,

				   struct mlx5dr_matcher_rx_tx *nic_matcher,

				   struct mlx5dr_matcher_rx_tx *nic_matcher,

				   enum mlx5dr_ipv outer_ipv,

				   enum mlx5dr_ipv outer_ipv,
@@ -262,9 +271,9 @@ static int dr_matcher_set_ste_builders(struct mlx5dr_matcher *matcher, 
								  inner, rx);

								  inner, rx);

		}

		}





		if (dr_mask_is_flex_parser_tnl_set(&mask.misc3) &&

		if (dr_mask_is_flex_parser_tnl_vxlan_gpe_set(&mask, dmn))

		    dr_matcher_supp_flex_parser_vxlan_gpe(dmn))

			mlx5dr_ste_build_flex_parser_tnl_vxlan_gpe(&sb[idx++],

			mlx5dr_ste_build_flex_parser_tnl(&sb[idx++], &mask,

								   &mask,

								   inner, rx);

								   inner, rx);





		if (DR_MASK_IS_ETH_L4_MISC_SET(mask.misc3, outer))

		if (DR_MASK_IS_ETH_L4_MISC_SET(mask.misc3, outer))

drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c

+31 −42
Original line number Original line Diff line number Diff line
@@ -2103,30 +2103,25 @@ void mlx5dr_ste_build_eth_l4_misc(struct mlx5dr_ste_build *sb, 
	sb->ste_build_tag_func = &dr_ste_build_eth_l4_misc_tag;

	sb->ste_build_tag_func = &dr_ste_build_eth_l4_misc_tag;

}

}





static void dr_ste_build_flex_parser_tnl_bit_mask(struct mlx5dr_match_param *value,

static void

dr_ste_build_flex_parser_tnl_vxlan_gpe_bit_mask(struct mlx5dr_match_param *value,

						bool inner, u8 *bit_mask)

						bool inner, u8 *bit_mask)

{

{

	struct mlx5dr_match_misc3 *misc_3_mask = &value->misc3;

	struct mlx5dr_match_misc3 *misc_3_mask = &value->misc3;





	if (misc_3_mask->outer_vxlan_gpe_flags ||

	DR_STE_SET_MASK_V(flex_parser_tnl_vxlan_gpe, bit_mask,

	    misc_3_mask->outer_vxlan_gpe_next_protocol) {

			  outer_vxlan_gpe_flags,

		MLX5_SET(ste_flex_parser_tnl, bit_mask,

			  misc_3_mask, outer_vxlan_gpe_flags);

			 flex_parser_tunneling_header_63_32,

	DR_STE_SET_MASK_V(flex_parser_tnl_vxlan_gpe, bit_mask,

			 (misc_3_mask->outer_vxlan_gpe_flags << 24) |

			  outer_vxlan_gpe_next_protocol,

			 (misc_3_mask->outer_vxlan_gpe_next_protocol));

			  misc_3_mask, outer_vxlan_gpe_next_protocol);

		misc_3_mask->outer_vxlan_gpe_flags = 0;

	DR_STE_SET_MASK_V(flex_parser_tnl_vxlan_gpe, bit_mask,

		misc_3_mask->outer_vxlan_gpe_next_protocol = 0;

			  outer_vxlan_gpe_vni,

	}

			  misc_3_mask, outer_vxlan_gpe_vni);



	if (misc_3_mask->outer_vxlan_gpe_vni) {

		MLX5_SET(ste_flex_parser_tnl, bit_mask,

			 flex_parser_tunneling_header_31_0,

			 misc_3_mask->outer_vxlan_gpe_vni << 8);

		misc_3_mask->outer_vxlan_gpe_vni = 0;

	}

}

}





static int dr_ste_build_flex_parser_tnl_tag(struct mlx5dr_match_param *value,

static int

dr_ste_build_flex_parser_tnl_vxlan_gpe_tag(struct mlx5dr_match_param *value,

					   struct mlx5dr_ste_build *sb,

					   struct mlx5dr_ste_build *sb,

					   u8 *hw_ste_p)

					   u8 *hw_ste_p)

{

{
@@ -2134,37 +2129,31 @@ static int dr_ste_build_flex_parser_tnl_tag(struct mlx5dr_match_param *value, 
	struct mlx5dr_match_misc3 *misc3 = &value->misc3;

	struct mlx5dr_match_misc3 *misc3 = &value->misc3;

	u8 *tag = hw_ste->tag;

	u8 *tag = hw_ste->tag;





	if (misc3->outer_vxlan_gpe_flags ||

	DR_STE_SET_TAG(flex_parser_tnl_vxlan_gpe, tag,

	    misc3->outer_vxlan_gpe_next_protocol) {

		       outer_vxlan_gpe_flags, misc3,

		MLX5_SET(ste_flex_parser_tnl, tag,

		       outer_vxlan_gpe_flags);

			 flex_parser_tunneling_header_63_32,

	DR_STE_SET_TAG(flex_parser_tnl_vxlan_gpe, tag,

			 (misc3->outer_vxlan_gpe_flags << 24) |

		       outer_vxlan_gpe_next_protocol, misc3,

			 (misc3->outer_vxlan_gpe_next_protocol));

		       outer_vxlan_gpe_next_protocol);

		misc3->outer_vxlan_gpe_flags = 0;

	DR_STE_SET_TAG(flex_parser_tnl_vxlan_gpe, tag,

		misc3->outer_vxlan_gpe_next_protocol = 0;

		       outer_vxlan_gpe_vni, misc3,

	}

		       outer_vxlan_gpe_vni);



	if (misc3->outer_vxlan_gpe_vni) {

		MLX5_SET(ste_flex_parser_tnl, tag,

			 flex_parser_tunneling_header_31_0,

			 misc3->outer_vxlan_gpe_vni << 8);

		misc3->outer_vxlan_gpe_vni = 0;

	}





	return 0;

	return 0;

}

}





void mlx5dr_ste_build_flex_parser_tnl(struct mlx5dr_ste_build *sb,

void mlx5dr_ste_build_flex_parser_tnl_vxlan_gpe(struct mlx5dr_ste_build *sb,

						struct mlx5dr_match_param *mask,

						struct mlx5dr_match_param *mask,

						bool inner, bool rx)

						bool inner, bool rx)

{

{

	dr_ste_build_flex_parser_tnl_bit_mask(mask, inner, sb->bit_mask);

	dr_ste_build_flex_parser_tnl_vxlan_gpe_bit_mask(mask, inner,

							sb->bit_mask);





	sb->rx = rx;

	sb->rx = rx;

	sb->inner = inner;

	sb->inner = inner;

	sb->lu_type = MLX5DR_STE_LU_TYPE_FLEX_PARSER_TNL_HEADER;

	sb->lu_type = MLX5DR_STE_LU_TYPE_FLEX_PARSER_TNL_HEADER;

	sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask);

	sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask);

	sb->ste_build_tag_func = &dr_ste_build_flex_parser_tnl_tag;

	sb->ste_build_tag_func = &dr_ste_build_flex_parser_tnl_vxlan_gpe_tag;

}

}





static void dr_ste_build_register_0_bit_mask(struct mlx5dr_match_param *value,

static void dr_ste_build_register_0_bit_mask(struct mlx5dr_match_param *value,

drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h

+3 −3
Original line number Original line Diff line number Diff line
@@ -325,7 +325,7 @@ int mlx5dr_ste_build_flex_parser_1(struct mlx5dr_ste_build *sb, 
				   struct mlx5dr_match_param *mask,

				   struct mlx5dr_match_param *mask,

				   struct mlx5dr_cmd_caps *caps,

				   struct mlx5dr_cmd_caps *caps,

				   bool inner, bool rx);

				   bool inner, bool rx);

void mlx5dr_ste_build_flex_parser_tnl(struct mlx5dr_ste_build *sb,

void mlx5dr_ste_build_flex_parser_tnl_vxlan_gpe(struct mlx5dr_ste_build *sb,

						struct mlx5dr_match_param *mask,

						struct mlx5dr_match_param *mask,

						bool inner, bool rx);

						bool inner, bool rx);

void mlx5dr_ste_build_general_purpose(struct mlx5dr_ste_build *sb,

void mlx5dr_ste_build_general_purpose(struct mlx5dr_ste_build *sb,

drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h

+11 −0
Original line number Original line Diff line number Diff line
@@ -548,6 +548,17 @@ struct mlx5_ifc_ste_flex_parser_tnl_bits { 
	u8         reserved_at_40[0x40];

	u8         reserved_at_40[0x40];

};

};





struct mlx5_ifc_ste_flex_parser_tnl_vxlan_gpe_bits {

	u8         outer_vxlan_gpe_flags[0x8];

	u8         reserved_at_8[0x10];

	u8         outer_vxlan_gpe_next_protocol[0x8];



	u8         outer_vxlan_gpe_vni[0x18];

	u8         reserved_at_38[0x8];



	u8         reserved_at_40[0x40];

};



struct mlx5_ifc_ste_general_purpose_bits {

struct mlx5_ifc_ste_general_purpose_bits {

	u8         general_purpose_lookup_field[0x20];

	u8         general_purpose_lookup_field[0x20];

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