Commit 6e952d95 authored by Antoine Tenart's avatar Antoine Tenart Committed by David S. Miller
Browse files

net: macb: move the Tx and Rx buffer initialization into a function 



This patch moves the Tx and Rx buffer initialization into its own
function. This does not modify the behaviour of the driver and will be
helpful to convert the driver to phylink.

Signed-off-by: default avatarAntoine Tenart <antoine.tenart@bootlin.com>
Acked-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent d7eaf962

drivers/net/ethernet/cadence/macb_main.c

+24 −15
Original line number Diff line number Diff line
@@ -388,6 +388,27 @@ mdio_pm_exit: 
	return status;

}



static void macb_init_buffers(struct macb *bp)

{

	struct macb_queue *queue;

	unsigned int q;



	for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) {

		queue_writel(queue, RBQP, lower_32_bits(queue->rx_ring_dma));

#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT

		if (bp->hw_dma_cap & HW_DMA_CAP_64B)

			queue_writel(queue, RBQPH,

				     upper_32_bits(queue->rx_ring_dma));

#endif

		queue_writel(queue, TBQP, lower_32_bits(queue->tx_ring_dma));

#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT

		if (bp->hw_dma_cap & HW_DMA_CAP_64B)

			queue_writel(queue, TBQPH,

				     upper_32_bits(queue->tx_ring_dma));

#endif

	}

}



/**

 * macb_set_tx_clk() - Set a clock to a new frequency

 * @clk		Pointer to the clock to change
@@ -1314,26 +1335,14 @@ static void macb_hresp_error_task(unsigned long data) 
	bp->macbgem_ops.mog_init_rings(bp);



	/* Initialize TX and RX buffers */

	for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) {

		queue_writel(queue, RBQP, lower_32_bits(queue->rx_ring_dma));

#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT

		if (bp->hw_dma_cap & HW_DMA_CAP_64B)

			queue_writel(queue, RBQPH,

				     upper_32_bits(queue->rx_ring_dma));

#endif

		queue_writel(queue, TBQP, lower_32_bits(queue->tx_ring_dma));

#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT

		if (bp->hw_dma_cap & HW_DMA_CAP_64B)

			queue_writel(queue, TBQPH,

				     upper_32_bits(queue->tx_ring_dma));

#endif

	macb_init_buffers(bp);



	/* Enable interrupts */

	for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue)

		queue_writel(queue, IER,

			     bp->rx_intr_mask |

			     MACB_TX_INT_FLAGS |

			     MACB_BIT(HRESP));

	}



	ctrl |= MACB_BIT(RE) | MACB_BIT(TE);

	macb_writel(bp, NCR, ctrl);

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