Commit 6e26901a authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

clk: renesas: rcar-gen3: Add CCREE clocks 



Add the CryptoCell module clocks and their parents for the CryptoCell
instances in the various Renesas R-Car Gen3 SoCs that do not have
support for them yet in their clock drivers (M3-W/W+, M3-N, E3, D3).

The R-Car H3 clock driver already supports these clocks.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200124133137.15921-1-geert+renesas@glider.be
parent bb6d3fb3

drivers/clk/renesas/r8a7796-cpg-mssr.c

+2 −0
Original line number Diff line number Diff line
@@ -105,6 +105,7 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { 
	DEF_GEN3_SD("sd3",      R8A7796_CLK_SD3,   CLK_SDSRC,     0x26c),



	DEF_FIXED("cl",         R8A7796_CLK_CL,    CLK_PLL1_DIV2, 48, 1),

	DEF_FIXED("cr",         R8A7796_CLK_CR,    CLK_PLL1_DIV4,  2, 1),

	DEF_FIXED("cp",         R8A7796_CLK_CP,    CLK_EXTAL,      2, 1),

	DEF_FIXED("cpex",       R8A7796_CLK_CPEX,  CLK_EXTAL,      2, 1),
@@ -132,6 +133,7 @@ static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = { 
	DEF_MOD("sys-dmac2",		 217,	R8A7796_CLK_S3D1),

	DEF_MOD("sys-dmac1",		 218,	R8A7796_CLK_S3D1),

	DEF_MOD("sys-dmac0",		 219,	R8A7796_CLK_S0D3),

	DEF_MOD("sceg-pub",		 229,	R8A7796_CLK_CR),

	DEF_MOD("cmt3",			 300,	R8A7796_CLK_R),

	DEF_MOD("cmt2",			 301,	R8A7796_CLK_R),

	DEF_MOD("cmt1",			 302,	R8A7796_CLK_R),

drivers/clk/renesas/r8a77965-cpg-mssr.c

+3 −1
Original line number Diff line number Diff line
@@ -100,6 +100,7 @@ static const struct cpg_core_clk r8a77965_core_clks[] __initconst = { 
	DEF_GEN3_SD("sd3",	R8A77965_CLK_SD3,	CLK_SDSRC,	0x26c),



	DEF_FIXED("cl",		R8A77965_CLK_CL,	CLK_PLL1_DIV2, 48, 1),

	DEF_FIXED("cr",         R8A77965_CLK_CR,	CLK_PLL1_DIV4,  2, 1),

	DEF_FIXED("cp",		R8A77965_CLK_CP,	CLK_EXTAL,	2, 1),

	DEF_FIXED("cpex",	R8A77965_CLK_CPEX,	CLK_EXTAL,	2, 1),
@@ -127,6 +128,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = { 
	DEF_MOD("sys-dmac2",		217,	R8A77965_CLK_S3D1),

	DEF_MOD("sys-dmac1",		218,	R8A77965_CLK_S3D1),

	DEF_MOD("sys-dmac0",		219,	R8A77965_CLK_S0D3),

	DEF_MOD("sceg-pub",		229,	R8A77965_CLK_CR),



	DEF_MOD("cmt3",			300,	R8A77965_CLK_R),

	DEF_MOD("cmt2",			301,	R8A77965_CLK_R),

drivers/clk/renesas/r8a77990-cpg-mssr.c

+2 −0
Original line number Diff line number Diff line
@@ -105,6 +105,7 @@ static const struct cpg_core_clk r8a77990_core_clks[] __initconst = { 
	DEF_GEN3_SD("sd3",     R8A77990_CLK_SD3,   CLK_SDSRC,	  0x026c),



	DEF_FIXED("cl",        R8A77990_CLK_CL,    CLK_PLL1,      48, 1),

	DEF_FIXED("cr",        R8A77990_CLK_CR,    CLK_PLL1D2,     2, 1),

	DEF_FIXED("cp",        R8A77990_CLK_CP,    CLK_EXTAL,      2, 1),

	DEF_FIXED("cpex",      R8A77990_CLK_CPEX,  CLK_EXTAL,      4, 1),
@@ -135,6 +136,7 @@ static const struct mssr_mod_clk r8a77990_mod_clks[] __initconst = { 
	DEF_MOD("sys-dmac2",		 217,	R8A77990_CLK_S3D1),

	DEF_MOD("sys-dmac1",		 218,	R8A77990_CLK_S3D1),

	DEF_MOD("sys-dmac0",		 219,	R8A77990_CLK_S3D1),

	DEF_MOD("sceg-pub",		 229,	R8A77990_CLK_CR),



	DEF_MOD("cmt3",			 300,	R8A77990_CLK_R),

	DEF_MOD("cmt2",			 301,	R8A77990_CLK_R),

drivers/clk/renesas/r8a77995-cpg-mssr.c

+2 −0
Original line number Diff line number Diff line
@@ -91,6 +91,7 @@ static const struct cpg_core_clk r8a77995_core_clks[] __initconst = { 
	DEF_FIXED("s3d4",      R8A77995_CLK_S3D4,  CLK_S3,         4, 1),



	DEF_FIXED("cl",        R8A77995_CLK_CL,    CLK_PLL1,      48, 1),

	DEF_FIXED("cr",        R8A77995_CLK_CR,    CLK_PLL1D2,     2, 1),

	DEF_FIXED("cp",        R8A77995_CLK_CP,    CLK_EXTAL,      2, 1),

	DEF_FIXED("cpex",      R8A77995_CLK_CPEX,  CLK_EXTAL,      4, 1),
@@ -122,6 +123,7 @@ static const struct mssr_mod_clk r8a77995_mod_clks[] __initconst = { 
	DEF_MOD("sys-dmac2",		 217,	R8A77995_CLK_S3D1),

	DEF_MOD("sys-dmac1",		 218,	R8A77995_CLK_S3D1),

	DEF_MOD("sys-dmac0",		 219,	R8A77995_CLK_S3D1),

	DEF_MOD("sceg-pub",		 229,	R8A77995_CLK_CR),

	DEF_MOD("cmt3",			 300,	R8A77995_CLK_R),

	DEF_MOD("cmt2",			 301,	R8A77995_CLK_R),

	DEF_MOD("cmt1",			 302,	R8A77995_CLK_R),

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