Commit 6df1e7f2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 cpu changes from Ingo Molnar:
 "The biggest change that stands out is the increase of the
  CONFIG_NR_CPUS range from 4096 to 8192 - as real hardware out there
  already went beyond 4k CPUs ...

  We only allow more than 512 CPUs if offstack cpumasks are enabled.

  CONFIG_MAXSMP=y remains to be the 'you are nuts!' extreme testcase,
  which now means a max of 8192 CPUs"

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/cpu: Increase max CPU count to 8192
  x86/cpu: Allow higher NR_CPUS values
  x86/cpu: Always print SMP information in /proc/cpuinfo
  x86/cpu: Track legacy CPU model data only on 32-bit kernels
parents d96d8aa2 b53b5eda

arch/x86/Kconfig

+5 −3
Original line number Diff line number Diff line
@@ -826,14 +826,16 @@ config MAXSMP 
config NR_CPUS

	int "Maximum number of CPUs" if SMP && !MAXSMP

	range 2 8 if SMP && X86_32 && !X86_BIGSMP

	range 2 512 if SMP && !MAXSMP

	range 2 512 if SMP && !MAXSMP && !CPUMASK_OFFSTACK

	range 2 8192 if SMP && !MAXSMP && CPUMASK_OFFSTACK && X86_64

	default "1" if !SMP

	default "4096" if MAXSMP

	default "8192" if MAXSMP

	default "32" if SMP && (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000)

	default "8" if SMP

	---help---

	  This allows you to specify the maximum number of CPUs which this

	  kernel will support.  The maximum supported value is 512 and the

	  kernel will support.  If CPUMASK_OFFSTACK is enabled, the maximum

	  supported value is 4096, otherwise the maximum value is 512.  The

	  minimum value which makes sense is 2.



	  This is purely to save memory - each supported CPU adds

arch/x86/kernel/cpu/amd.c

+3 −3
Original line number Diff line number Diff line
@@ -823,8 +823,8 @@ static const struct cpu_dev amd_cpu_dev = { 
	.c_vendor	= "AMD",

	.c_ident	= { "AuthenticAMD" },

#ifdef CONFIG_X86_32

	.c_models = {

		{ .vendor = X86_VENDOR_AMD, .family = 4, .model_names =

	.legacy_models = {

		{ .family = 4, .model_names =

		  {

			  [3] = "486 DX/2",

			  [7] = "486 DX/2-WB",
@@ -835,7 +835,7 @@ static const struct cpu_dev amd_cpu_dev = { 
		  }

		},

	},

	.c_size_cache	= amd_size_cache,

	.legacy_cache_size = amd_size_cache,

#endif

	.c_early_init   = early_init_amd,

	.c_detect_tlb	= cpu_detect_tlb_amd,

arch/x86/kernel/cpu/centaur.c

+5 −3
Original line number Diff line number Diff line
@@ -468,10 +468,10 @@ static void init_centaur(struct cpuinfo_x86 *c) 
#endif

}



#ifdef CONFIG_X86_32

static unsigned int

centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size)

{

#ifdef CONFIG_X86_32

	/* VIA C3 CPUs (670-68F) need further shifting. */

	if ((c->x86 == 6) && ((c->x86_model == 7) || (c->x86_model == 8)))

		size >>= 8;
@@ -484,16 +484,18 @@ centaur_size_cache(struct cpuinfo_x86 *c, unsigned int size) 
	if ((c->x86 == 6) && (c->x86_model == 9) &&

				(c->x86_mask == 1) && (size == 65))

		size -= 1;

#endif

	return size;

}

#endif



static const struct cpu_dev centaur_cpu_dev = {

	.c_vendor	= "Centaur",

	.c_ident	= { "CentaurHauls" },

	.c_early_init	= early_init_centaur,

	.c_init		= init_centaur,

	.c_size_cache	= centaur_size_cache,

#ifdef CONFIG_X86_32

	.legacy_cache_size = centaur_size_cache,

#endif

	.c_x86_vendor	= X86_VENDOR_CENTAUR,

};

arch/x86/kernel/cpu/common.c

+7 −5
Original line number Diff line number Diff line
@@ -346,7 +346,8 @@ static void filter_cpuid_features(struct cpuinfo_x86 *c, bool warn) 
/* Look up CPU names by table lookup. */

static const char *table_lookup_model(struct cpuinfo_x86 *c)

{

	const struct cpu_model_info *info;

#ifdef CONFIG_X86_32

	const struct legacy_cpu_model_info *info;



	if (c->x86_model >= 16)

		return NULL;	/* Range check */
@@ -354,13 +355,14 @@ static const char *table_lookup_model(struct cpuinfo_x86 *c) 
	if (!this_cpu)

		return NULL;



	info = this_cpu->c_models;

	info = this_cpu->legacy_models;



	while (info && info->family) {

	while (info->family) {

		if (info->family == c->x86)

			return info->model_names[c->x86_model];

		info++;

	}

#endif

	return NULL;		/* Not found */

}
@@ -450,8 +452,8 @@ void cpu_detect_cache_sizes(struct cpuinfo_x86 *c) 
	c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);

#else

	/* do processor-specific cache resizing */

	if (this_cpu->c_size_cache)

		l2size = this_cpu->c_size_cache(c, l2size);

	if (this_cpu->legacy_cache_size)

		l2size = this_cpu->legacy_cache_size(c, l2size);



	/* Allow user to override all this if necessary. */

	if (cachesize_override != -1)

arch/x86/kernel/cpu/cpu.h

+11 −9
Original line number Diff line number Diff line 
#ifndef ARCH_X86_CPU_H

#define ARCH_X86_CPU_H



struct cpu_model_info {

	int		vendor;

	int		family;

	const char	*model_names[16];

};



/* attempt to consolidate cpu attributes */

struct cpu_dev {

	const char	*c_vendor;
@@ -14,15 +8,23 @@ struct cpu_dev { 
	/* some have two possibilities for cpuid string */

	const char	*c_ident[2];



	struct		cpu_model_info c_models[4];



	void            (*c_early_init)(struct cpuinfo_x86 *);

	void		(*c_bsp_init)(struct cpuinfo_x86 *);

	void		(*c_init)(struct cpuinfo_x86 *);

	void		(*c_identify)(struct cpuinfo_x86 *);

	void		(*c_detect_tlb)(struct cpuinfo_x86 *);

	unsigned int	(*c_size_cache)(struct cpuinfo_x86 *, unsigned int);

	int		c_x86_vendor;

#ifdef CONFIG_X86_32

	/* Optional vendor specific routine to obtain the cache size. */

	unsigned int	(*legacy_cache_size)(struct cpuinfo_x86 *,

					     unsigned int);



	/* Family/stepping-based lookup table for model names. */

	struct legacy_cpu_model_info {

		int		family;

		const char	*model_names[16];

	}		legacy_models[5];

#endif

};



struct _tlb_table {

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