Commit 6d597027 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau: use the same packet header macros as userspace 



Cosmetic cleanup only.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 78339fb7

drivers/gpu/drm/nouveau/nouveau_bo.c

+15 −15
Original line number Diff line number Diff line
@@ -495,7 +495,7 @@ nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo, 
	struct nouveau_mem *node = old_mem->mm_node;

	int ret = RING_SPACE(chan, 10);

	if (ret == 0) {

		BEGIN_NVC0(chan, 2, NvSubCopy, 0x0400, 8);

		BEGIN_NVC0(chan, NvSubCopy, 0x0400, 8);

		OUT_RING  (chan, upper_32_bits(node->vma[0].offset));

		OUT_RING  (chan, lower_32_bits(node->vma[0].offset));

		OUT_RING  (chan, upper_32_bits(node->vma[1].offset));
@@ -504,7 +504,7 @@ nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo, 
		OUT_RING  (chan, PAGE_SIZE);

		OUT_RING  (chan, PAGE_SIZE);

		OUT_RING  (chan, new_mem->num_pages);

		BEGIN_NVC0(chan, 8, NvSubCopy, 0x0300, 0x0386);

		BEGIN_IMC0(chan, NvSubCopy, 0x0300, 0x0386);

	}

	return ret;

}
@@ -527,17 +527,17 @@ nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, 
		if (ret)

			return ret;



		BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0238, 2);

		BEGIN_NVC0(chan, NvSubM2MF, 0x0238, 2);

		OUT_RING  (chan, upper_32_bits(dst_offset));

		OUT_RING  (chan, lower_32_bits(dst_offset));

		BEGIN_NVC0(chan, 2, NvSubM2MF, 0x030c, 6);

		BEGIN_NVC0(chan, NvSubM2MF, 0x030c, 6);

		OUT_RING  (chan, upper_32_bits(src_offset));

		OUT_RING  (chan, lower_32_bits(src_offset));

		OUT_RING  (chan, PAGE_SIZE); /* src_pitch */

		OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */

		OUT_RING  (chan, PAGE_SIZE); /* line_length */

		OUT_RING  (chan, line_count);

		BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0300, 1);

		BEGIN_NVC0(chan, NvSubM2MF, 0x0300, 1);

		OUT_RING  (chan, 0x00100110);



		page_count -= line_count;
@@ -572,7 +572,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, 
			if (ret)

				return ret;



			BEGIN_RING(chan, NvSubM2MF, 0x0200, 7);

			BEGIN_NV04(chan, NvSubM2MF, 0x0200, 7);

			OUT_RING  (chan, 0);

			OUT_RING  (chan, 0);

			OUT_RING  (chan, stride);
@@ -585,7 +585,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, 
			if (ret)

				return ret;



			BEGIN_RING(chan, NvSubM2MF, 0x0200, 1);

			BEGIN_NV04(chan, NvSubM2MF, 0x0200, 1);

			OUT_RING  (chan, 1);

		}

		if (old_mem->mem_type == TTM_PL_VRAM &&
@@ -594,7 +594,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, 
			if (ret)

				return ret;



			BEGIN_RING(chan, NvSubM2MF, 0x021c, 7);

			BEGIN_NV04(chan, NvSubM2MF, 0x021c, 7);

			OUT_RING  (chan, 0);

			OUT_RING  (chan, 0);

			OUT_RING  (chan, stride);
@@ -607,7 +607,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, 
			if (ret)

				return ret;



			BEGIN_RING(chan, NvSubM2MF, 0x021c, 1);

			BEGIN_NV04(chan, NvSubM2MF, 0x021c, 1);

			OUT_RING  (chan, 1);

		}
@@ -615,10 +615,10 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, 
		if (ret)

			return ret;



		BEGIN_RING(chan, NvSubM2MF, 0x0238, 2);

		BEGIN_NV04(chan, NvSubM2MF, 0x0238, 2);

		OUT_RING  (chan, upper_32_bits(src_offset));

		OUT_RING  (chan, upper_32_bits(dst_offset));

		BEGIN_RING(chan, NvSubM2MF, 0x030c, 8);

		BEGIN_NV04(chan, NvSubM2MF, 0x030c, 8);

		OUT_RING  (chan, lower_32_bits(src_offset));

		OUT_RING  (chan, lower_32_bits(dst_offset));

		OUT_RING  (chan, stride);
@@ -627,7 +627,7 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, 
		OUT_RING  (chan, height);

		OUT_RING  (chan, 0x00000101);

		OUT_RING  (chan, 0x00000000);

		BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);

		BEGIN_NV04(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);

		OUT_RING  (chan, 0);



		length -= amount;
@@ -660,7 +660,7 @@ nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, 
	if (ret)

		return ret;



	BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);

	BEGIN_NV04(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);

	OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, old_mem));

	OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, new_mem));
@@ -672,7 +672,7 @@ nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, 
		if (ret)

			return ret;



		BEGIN_RING(chan, NvSubM2MF,

		BEGIN_NV04(chan, NvSubM2MF,

				 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);

		OUT_RING  (chan, src_offset);

		OUT_RING  (chan, dst_offset);
@@ -682,7 +682,7 @@ nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, 
		OUT_RING  (chan, line_count);

		OUT_RING  (chan, 0x00000101);

		OUT_RING  (chan, 0x00000000);

		BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);

		BEGIN_NV04(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);

		OUT_RING  (chan, 0);



		page_count -= line_count;

drivers/gpu/drm/nouveau/nouveau_display.c

+3 −3
Original line number Diff line number Diff line
@@ -446,13 +446,13 @@ nouveau_page_flip_emit(struct nouveau_channel *chan, 
		goto fail;



	if (dev_priv->card_type < NV_C0) {

		BEGIN_RING(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);

		BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);

		OUT_RING  (chan, 0x00000000);

		OUT_RING  (chan, 0x00000000);

	} else {

		BEGIN_NVC0(chan, 2, 0, NV10_SUBCHAN_REF_CNT, 1);

		BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);

		OUT_RING  (chan, ++chan->fence.sequence);

		BEGIN_NVC0(chan, 8, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);

		BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);

	}

	FIRE_RING (chan);

drivers/gpu/drm/nouveau/nouveau_dma.h

+22 −4
Original line number Diff line number Diff line
@@ -128,15 +128,33 @@ extern void 
OUT_RINGp(struct nouveau_channel *chan, const void *data, unsigned nr_dwords);



static inline void

BEGIN_NVC0(struct nouveau_channel *chan, int op, int subc, int mthd, int size)

BEGIN_NV04(struct nouveau_channel *chan, int subc, int mthd, int size)

{

	OUT_RING(chan, (op << 28) | (size << 16) | (subc << 13) | (mthd >> 2));

	OUT_RING(chan, 0x00000000 | (subc << 13) | (size << 18) | mthd);

}



static inline void

BEGIN_RING(struct nouveau_channel *chan, int subc, int mthd, int size)

BEGIN_NI04(struct nouveau_channel *chan, int subc, int mthd, int size)

{

	OUT_RING(chan, (subc << 13) | (size << 18) | mthd);

	OUT_RING(chan, 0x40000000 | (subc << 13) | (size << 18) | mthd);

}



static inline void

BEGIN_NVC0(struct nouveau_channel *chan, int subc, int mthd, int size)

{

	OUT_RING(chan, 0x20000000 | (size << 16) | (subc << 13) | (mthd >> 2));

}



static inline void

BEGIN_NIC0(struct nouveau_channel *chan, int subc, int mthd, int size)

{

	OUT_RING(chan, 0x60000000 | (size << 16) | (subc << 13) | (mthd >> 2));

}



static inline void

BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data)

{

	OUT_RING(chan, 0x80000000 | (data << 16) | (subc << 13) | (mthd >> 2));

}



#define WRITE_PUT(val) do {                                                    \

drivers/gpu/drm/nouveau/nouveau_fbcon.c

+4 −4
Original line number Diff line number Diff line
@@ -171,14 +171,14 @@ nouveau_fbcon_sync(struct fb_info *info) 
	}



	if (dev_priv->card_type >= NV_C0) {

		BEGIN_NVC0(chan, 2, NvSub2D, 0x010c, 1);

		BEGIN_NVC0(chan, NvSub2D, 0x010c, 1);

		OUT_RING  (chan, 0);

		BEGIN_NVC0(chan, 2, NvSub2D, 0x0100, 1);

		BEGIN_NVC0(chan, NvSub2D, 0x0100, 1);

		OUT_RING  (chan, 0);

	} else {

		BEGIN_RING(chan, 0, 0x0104, 1);

		BEGIN_NV04(chan, 0, 0x0104, 1);

		OUT_RING  (chan, 0);

		BEGIN_RING(chan, 0, 0x0100, 1);

		BEGIN_NV04(chan, 0, 0x0100, 1);

		OUT_RING  (chan, 0);

	}

drivers/gpu/drm/nouveau/nouveau_fence.c

+13 −13
Original line number Diff line number Diff line
@@ -164,11 +164,11 @@ nouveau_fence_emit(struct nouveau_fence *fence) 


	if (USE_REFCNT(dev)) {

		if (dev_priv->card_type < NV_C0)

			BEGIN_RING(chan, 0, NV10_SUBCHAN_REF_CNT, 1);

			BEGIN_NV04(chan, 0, NV10_SUBCHAN_REF_CNT, 1);

		else

			BEGIN_NVC0(chan, 2, 0, NV10_SUBCHAN_REF_CNT, 1);

			BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);

	} else {

		BEGIN_RING(chan, NvSubSw, 0x0150, 1);

		BEGIN_NV04(chan, NvSubSw, 0x0150, 1);

	}

	OUT_RING (chan, fence->sequence);

	FIRE_RING(chan);
@@ -343,7 +343,7 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema) 
		if (ret)

			return ret;



		BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 3);

		BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 3);

		OUT_RING  (chan, NvSema);

		OUT_RING  (chan, offset);

		OUT_RING  (chan, 1);
@@ -353,9 +353,9 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema) 
		if (ret)

			return ret;



		BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);

		BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);

		OUT_RING  (chan, chan->vram_handle);

		BEGIN_RING(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);

		BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);

		OUT_RING  (chan, upper_32_bits(offset));

		OUT_RING  (chan, lower_32_bits(offset));

		OUT_RING  (chan, 1);
@@ -365,7 +365,7 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema) 
		if (ret)

			return ret;



		BEGIN_NVC0(chan, 2, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);

		BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);

		OUT_RING  (chan, upper_32_bits(offset));

		OUT_RING  (chan, lower_32_bits(offset));

		OUT_RING  (chan, 1);
@@ -396,10 +396,10 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema) 
		if (ret)

			return ret;



		BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 2);

		BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 2);

		OUT_RING  (chan, NvSema);

		OUT_RING  (chan, offset);

		BEGIN_RING(chan, 0, NV11_SUBCHAN_SEMAPHORE_RELEASE, 1);

		BEGIN_NV04(chan, 0, NV11_SUBCHAN_SEMAPHORE_RELEASE, 1);

		OUT_RING  (chan, 1);

	} else

	if (dev_priv->chipset < 0xc0) {
@@ -407,9 +407,9 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema) 
		if (ret)

			return ret;



		BEGIN_RING(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);

		BEGIN_NV04(chan, 0, NV11_SUBCHAN_DMA_SEMAPHORE, 1);

		OUT_RING  (chan, chan->vram_handle);

		BEGIN_RING(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);

		BEGIN_NV04(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);

		OUT_RING  (chan, upper_32_bits(offset));

		OUT_RING  (chan, lower_32_bits(offset));

		OUT_RING  (chan, 1);
@@ -419,7 +419,7 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema) 
		if (ret)

			return ret;



		BEGIN_NVC0(chan, 2, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);

		BEGIN_NVC0(chan, 0, NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH, 4);

		OUT_RING  (chan, upper_32_bits(offset));

		OUT_RING  (chan, lower_32_bits(offset));

		OUT_RING  (chan, 1);
@@ -509,7 +509,7 @@ nouveau_fence_channel_init(struct nouveau_channel *chan) 
		if (ret)

			return ret;



		BEGIN_RING(chan, NvSubSw, NV01_SUBCHAN_OBJECT, 1);

		BEGIN_NV04(chan, NvSubSw, NV01_SUBCHAN_OBJECT, 1);

		OUT_RING  (chan, NvSw);

		FIRE_RING (chan);

	}

CRA Git | Maintained and supported by SUSTech CRA and CCSE