Commit 6d2c2b9f authored by Milo Kim's avatar Milo Kim Committed by Lee Jones
Browse files

mfd: tps65217: Update register interrupt mask bits instead of writing operation 



TPS65217 interrupt register includes read/writeable mask bits with
read-only status bits. (bit 4, 5, 6 are R/W, bit 0, 1, 2 are RO)
And reserved bit is not required.

Register update operation is preferred for disabling all interrupts during
the device initialisation.

Signed-off-by: default avatarMilo Kim <woogyom.kim@gmail.com>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
parent f6602064

drivers/mfd/tps65217.c

+3 −4
Original line number Diff line number Diff line
@@ -189,10 +189,9 @@ static int tps65217_irq_init(struct tps65217 *tps, int irq) 
	tps->irq = irq;



	/* Mask all interrupt sources */

	tps->irq_mask = (TPS65217_INT_RESERVEDM | TPS65217_INT_PBM

			| TPS65217_INT_ACM | TPS65217_INT_USBM);

	tps65217_reg_write(tps, TPS65217_REG_INT, tps->irq_mask,

			TPS65217_PROTECT_NONE);

	tps->irq_mask = TPS65217_INT_MASK;

	tps65217_set_bits(tps, TPS65217_REG_INT, TPS65217_INT_MASK,

			  TPS65217_INT_MASK, TPS65217_PROTECT_NONE);



	tps->irq_domain = irq_domain_add_linear(tps->dev->of_node,

		TPS65217_NUM_IRQ, &tps65217_irq_domain_ops, tps);

include/linux/mfd/tps65217.h

+2 −1
Original line number Diff line number Diff line
@@ -73,13 +73,14 @@ 
#define TPS65217_PPATH_AC_CURRENT_MASK	0x0C

#define TPS65217_PPATH_USB_CURRENT_MASK	0x03



#define TPS65217_INT_RESERVEDM		BIT(7)

#define TPS65217_INT_PBM		BIT(6)

#define TPS65217_INT_ACM		BIT(5)

#define TPS65217_INT_USBM		BIT(4)

#define TPS65217_INT_PBI		BIT(2)

#define TPS65217_INT_ACI		BIT(1)

#define TPS65217_INT_USBI		BIT(0)

#define TPS65217_INT_MASK		(TPS65217_INT_PBM | TPS65217_INT_ACM | \

					TPS65217_INT_USBM)



#define TPS65217_CHGCONFIG0_TREG	BIT(7)

#define TPS65217_CHGCONFIG0_DPPM	BIT(6)

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