Commit 6d19a44c authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: s/tile_offset/aligned_offset/ etc. 



Rename some of the tile_offset() functions to aligned_offset() since
they operate on both linear and tiled functions. And we'll include
_plane_ in the name of all the variants that take a plane state.
Should make it more clear which function to use where.

v2: Pimp the patch subject a bit (José)

Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180907152413.15761-2-ville.syrjala@linux.intel.com
parent 35e882a4

drivers/gpu/drm/i915/intel_display.c

+63 −60
Original line number Diff line number Diff line
@@ -2229,7 +2229,7 @@ void intel_add_fb_offsets(int *x, int *y, 
	}

}



static u32 __intel_adjust_tile_offset(int *x, int *y,

static u32 intel_adjust_tile_offset(int *x, int *y,

				    unsigned int tile_width,

				    unsigned int tile_height,

				    unsigned int tile_size,
@@ -2256,12 +2256,12 @@ static u32 __intel_adjust_tile_offset(int *x, int *y, 
	return new_offset;

}



static u32 _intel_adjust_tile_offset(int *x, int *y,

static u32 intel_adjust_aligned_offset(int *x, int *y,

				       const struct drm_framebuffer *fb, int plane,

				       unsigned int rotation,

				       u32 old_offset, u32 new_offset)

{

	const struct drm_i915_private *dev_priv = to_i915(fb->dev);

	struct drm_i915_private *dev_priv = to_i915(fb->dev);

	unsigned int cpp = fb->format->cpp[plane];

	unsigned int pitch = intel_fb_pitch(fb, plane, rotation);
@@ -2281,7 +2281,7 @@ static u32 _intel_adjust_tile_offset(int *x, int *y, 
			pitch_tiles = pitch / (tile_width * cpp);

		}



		__intel_adjust_tile_offset(x, y, tile_width, tile_height,

		intel_adjust_tile_offset(x, y, tile_width, tile_height,

					 tile_size, pitch_tiles,

					 old_offset, new_offset);

	} else {
@@ -2298,17 +2298,18 @@ static u32 _intel_adjust_tile_offset(int *x, int *y, 
 * Adjust the tile offset by moving the difference into

 * the x/y offsets.

 */

static u32 intel_adjust_tile_offset(int *x, int *y,

				    const struct intel_plane_state *state, int plane,

static u32 intel_plane_adjust_aligned_offset(int *x, int *y,

					     const struct intel_plane_state *state,

					     int plane,

					     u32 old_offset, u32 new_offset)

{

	return _intel_adjust_tile_offset(x, y, state->base.fb, plane,

	return intel_adjust_aligned_offset(x, y, state->base.fb, plane,

					   state->base.rotation,

					   old_offset, new_offset);

}



/*

 * Computes the linear offset to the base tile and adjusts

 * Computes the aligned offset to the base tile and adjusts

 * x, y. bytes per pixel is assumed to be a power-of-two.

 *

 * In the 90/270 rotated case, x and y are assumed
@@ -2321,7 +2322,7 @@ static u32 intel_adjust_tile_offset(int *x, int *y, 
 * used. This is why the user has to pass in the pitch since it

 * is specified in the rotated orientation.

 */

static u32 _intel_compute_tile_offset(const struct drm_i915_private *dev_priv,

static u32 intel_compute_aligned_offset(struct drm_i915_private *dev_priv,

					int *x, int *y,

					const struct drm_framebuffer *fb, int plane,

					unsigned int pitch,
@@ -2358,7 +2359,7 @@ static u32 _intel_compute_tile_offset(const struct drm_i915_private *dev_priv, 
		offset = (tile_rows * pitch_tiles + tiles) * tile_size;

		offset_aligned = offset & ~alignment;



		__intel_adjust_tile_offset(x, y, tile_width, tile_height,

		intel_adjust_tile_offset(x, y, tile_width, tile_height,

					 tile_size, pitch_tiles,

					 offset, offset_aligned);

	} else {
@@ -2372,7 +2373,7 @@ static u32 _intel_compute_tile_offset(const struct drm_i915_private *dev_priv, 
	return offset_aligned;

}



u32 intel_compute_tile_offset(int *x, int *y,

static u32 intel_plane_compute_aligned_offset(int *x, int *y,

					      const struct intel_plane_state *state,

					      int plane)

{
@@ -2388,8 +2389,8 @@ u32 intel_compute_tile_offset(int *x, int *y, 
	else

		alignment = intel_surf_alignment(fb, plane);



	return _intel_compute_tile_offset(dev_priv, x, y, fb, plane, pitch,

					  rotation, alignment);

	return intel_compute_aligned_offset(dev_priv, x, y, fb, plane,

					    pitch, rotation, alignment);

}



/* Convert the fb->offset[] into x/y offsets */
@@ -2405,7 +2406,7 @@ static int intel_fb_offset_to_xy(int *x, int *y, 
	*x = 0;

	*y = 0;



	_intel_adjust_tile_offset(x, y,

	intel_adjust_aligned_offset(x, y,

				    fb, plane, DRM_MODE_ROTATE_0,

				    fb->offsets[plane], 0);
@@ -2564,9 +2565,10 @@ intel_fill_fb_info(struct drm_i915_private *dev_priv, 
		intel_fb->normal[i].x = x;

		intel_fb->normal[i].y = y;



		offset = _intel_compute_tile_offset(dev_priv, &x, &y,

						    fb, i, fb->pitches[i],

						    DRM_MODE_ROTATE_0, tile_size);

		offset = intel_compute_aligned_offset(dev_priv, &x, &y, fb, i,

						      fb->pitches[i],

						      DRM_MODE_ROTATE_0,

						      tile_size);

		offset /= tile_size;



		if (fb->modifier != DRM_FORMAT_MOD_LINEAR) {
@@ -2613,7 +2615,7 @@ intel_fill_fb_info(struct drm_i915_private *dev_priv, 
			 * We only keep the x/y offsets, so push all of the

			 * gtt offset into the x/y offsets.

			 */

			__intel_adjust_tile_offset(&x, &y,

			intel_adjust_tile_offset(&x, &y,

						 tile_width, tile_height,

						 tile_size, pitch_tiles,

						 gtt_offset_rotated * tile_size, 0);
@@ -2965,7 +2967,7 @@ static bool skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state 


		x = aux_x / hsub;

		y = aux_y / vsub;

		aux_offset = intel_adjust_tile_offset(&x, &y, plane_state, 1,

		aux_offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 1,

							       aux_offset, aux_offset - alignment);

		aux_x = x * hsub + aux_x % hsub;

		aux_y = y * vsub + aux_y % vsub;
@@ -3024,7 +3026,7 @@ static int skl_check_main_surface(const struct intel_crtc_state *crtc_state, 
	}



	intel_add_fb_offsets(&x, &y, plane_state, 0);

	offset = intel_compute_tile_offset(&x, &y, plane_state, 0);

	offset = intel_plane_compute_aligned_offset(&x, &y, plane_state, 0);

	alignment = intel_surf_alignment(fb, 0);



	/*
@@ -3033,7 +3035,7 @@ static int skl_check_main_surface(const struct intel_crtc_state *crtc_state, 
	 * sure that is what we will get.

	 */

	if (offset > aux_offset)

		offset = intel_adjust_tile_offset(&x, &y, plane_state, 0,

		offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,

							   offset, aux_offset & ~(alignment - 1));



	/*
@@ -3051,7 +3053,7 @@ static int skl_check_main_surface(const struct intel_crtc_state *crtc_state, 
				return -EINVAL;

			}



			offset = intel_adjust_tile_offset(&x, &y, plane_state, 0,

			offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,

								   offset, offset - alignment);

		}

	}
@@ -3065,7 +3067,7 @@ static int skl_check_main_surface(const struct intel_crtc_state *crtc_state, 
			if (offset == 0)

				break;



			offset = intel_adjust_tile_offset(&x, &y, plane_state, 0,

			offset = intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,

								   offset, offset - alignment);

		}
@@ -3118,7 +3120,7 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state) 
	u32 offset;



	intel_add_fb_offsets(&x, &y, plane_state, 1);

	offset = intel_compute_tile_offset(&x, &y, plane_state, 1);

	offset = intel_plane_compute_aligned_offset(&x, &y, plane_state, 1);



	/* FIXME not quite sure how/if these apply to the chroma plane */

	if (w > max_width || h > max_height) {
@@ -3152,7 +3154,7 @@ static int skl_check_ccs_aux_surface(struct intel_plane_state *plane_state) 
	}



	intel_add_fb_offsets(&x, &y, plane_state, 1);

	offset = intel_compute_tile_offset(&x, &y, plane_state, 1);

	offset = intel_plane_compute_aligned_offset(&x, &y, plane_state, 1);



	plane_state->aux.offset = offset;

	plane_state->aux.x = x * hsub + src_x % hsub;
@@ -3284,7 +3286,7 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state) 
	intel_add_fb_offsets(&src_x, &src_y, plane_state, 0);



	if (INTEL_GEN(dev_priv) >= 4)

		offset = intel_compute_tile_offset(&src_x, &src_y,

		offset = intel_plane_compute_aligned_offset(&src_x, &src_y,

							    plane_state, 0);

	else

		offset = 0;
@@ -9666,7 +9668,8 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state, 
	src_y = plane_state->base.src_y >> 16;



	intel_add_fb_offsets(&src_x, &src_y, plane_state, 0);

	offset = intel_compute_tile_offset(&src_x, &src_y, plane_state, 0);

	offset = intel_plane_compute_aligned_offset(&src_x, &src_y,

						    plane_state, 0);



	if (src_x != 0 || src_y != 0) {

		DRM_DEBUG_KMS("Arbitrary cursor panning not supported\n");

drivers/gpu/drm/i915/intel_drv.h

+0 −2
Original line number Diff line number Diff line
@@ -1612,8 +1612,6 @@ void assert_fdi_rx_pll(struct drm_i915_private *dev_priv, 
void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state);

#define assert_pipe_enabled(d, p) assert_pipe(d, p, true)

#define assert_pipe_disabled(d, p) assert_pipe(d, p, false)

u32 intel_compute_tile_offset(int *x, int *y,

			      const struct intel_plane_state *state, int plane);

void intel_prepare_reset(struct drm_i915_private *dev_priv);

void intel_finish_reset(struct drm_i915_private *dev_priv);

void hsw_enable_pc8(struct drm_i915_private *dev_priv);

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