PCI: mobiveil: Use pci_parse_request_of_pci_ranges() (6c6a0dff) · Commits · 戴 / test

drivers/pci/controller/pcie-mobiveil.c

+7 −19

Original line number	Diff line number	Diff line
		@@ -140,7 +140,6 @@ struct mobiveil_msi { /* MSI information */

		struct mobiveil_pcie {
		struct platform_device *pdev;
		struct list_head resources;
		void __iomem config_axi_slave_base; / endpoint config base */
		void __iomem csr_axi_slave_base; / root port config base */
		void __iomem apb_csr_base; / MSI register base */
		@@ -575,6 +574,7 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie)

		static int mobiveil_host_init(struct mobiveil_pcie *pcie)
		{
		struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
		u32 value, pab_ctrl, type;
		struct resource_entry *win;

		@@ -631,7 +631,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
		program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);

		/* Get the I/O and memory ranges from DT */
		resource_list_for_each_entry(win, &pcie->resources) {
		resource_list_for_each_entry(win, &bridge->windows) {
		if (resource_type(win->res) == IORESOURCE_MEM)
		type = MEM_WINDOW_TYPE;
		else if (resource_type(win->res) == IORESOURCE_IO)
		@@ -857,7 +857,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
		struct pci_bus *child;
		struct pci_host_bridge *bridge;
		struct device *dev = &pdev->dev;
		resource_size_t iobase;
		int ret;

		/* allocate the PCIe port */
		@@ -875,11 +874,8 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
		return ret;
		}

		INIT_LIST_HEAD(&pcie->resources);

		/* parse the host bridge base addresses from the device tree file */
		ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
		&pcie->resources, &iobase);
		ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL);
		if (ret) {
		dev_err(dev, "Getting bridge resources failed\n");
		return ret;
		@@ -892,24 +888,19 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
		ret = mobiveil_host_init(pcie);
		if (ret) {
		dev_err(dev, "Failed to initialize host\n");
		goto error;
		return ret;
		}

		/* initialize the IRQ domains */
		ret = mobiveil_pcie_init_irq_domain(pcie);
		if (ret) {
		dev_err(dev, "Failed creating IRQ Domain\n");
		goto error;
		return ret;
		}

		irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie);

		ret = devm_request_pci_bus_resources(dev, &pcie->resources);
		if (ret)
		goto error;

		/* Initialize bridge */
		list_splice_init(&pcie->resources, &bridge->windows);
		bridge->dev.parent = dev;
		bridge->sysdata = pcie;
		bridge->busnr = pcie->root_bus_nr;
		@@ -920,13 +911,13 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
		ret = mobiveil_bringup_link(pcie);
		if (ret) {
		dev_info(dev, "link bring-up failed\n");
		goto error;
		return ret;
		}

		/* setup the kernel resources for the newly added PCIe root bus */
		ret = pci_scan_root_bus_bridge(bridge);
		if (ret)
		goto error;
		return ret;

		bus = bridge->bus;

		@@ -936,9 +927,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
		pci_bus_add_devices(bus);

		return 0;
		error:
		pci_free_resource_list(&pcie->resources);
		return ret;
		}

		static const struct of_device_id mobiveil_pcie_of_match[] = {

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