Commit 6c3f6041 authored by Sheng Yang's avatar Sheng Yang Committed by Avi Kivity
Browse files

KVM: x86: Enable AVX for guest 



Enable Intel(R) Advanced Vector Extension(AVX) for guest.

The detection of AVX feature includes OSXSAVE bit testing. When OSXSAVE bit is
not set, even if AVX is supported, the AVX instruction would result in UD as
well. So we're safe to expose AVX bits to guest directly.

Signed-off-by: default avatarSheng Yang <sheng@linux.intel.com>
Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
parent 7ac77099

arch/x86/kvm/x86.c

+2 −2
Original line number Diff line number Diff line
@@ -1963,13 +1963,13 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, 
		0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);

	/* cpuid 1.ecx */

	const u32 kvm_supported_word4_x86_features =

		F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |

		F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |

		0 /* DS-CPL, VMX, SMX, EST */ |

		0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |

		0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |

		0 /* Reserved, DCA */ | F(XMM4_1) |

		F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |

		0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */;

		0 /* Reserved, AES */ | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX);

	/* cpuid 0x80000001.ecx */

	const u32 kvm_supported_word6_x86_features =

		F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |

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