Commit 6c17e9dd authored Aug 05, 2020 by Mohan Kumar Committed by Takashi Iwai Aug 05, 2020

ASoC: hda/tegra: Set buffer alignment to 128 bytes



Set chip->align_buffer_size to 1 for Tegra platforms to make the buffer
alignment to be multiple of 128 bytes. This fix is applied as gstreamer
alsasink gets stuck with the default buffer-time and latency-time
parameters with 4 byte buffer alignment.

Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Link: https://lore.kernel.org/r/20200805095221.5476-2-mkumard@nvidia.com


Signed-off-by: Takashi Iwai <tiwai@suse.de>

parent 80982c7e

sound/pci/hda/hda_tegra.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -333,6 +333,8 @@ static int hda_tegra_first_init(struct azx chip, struct platform_device pdev)
		gcap = azx_readw(chip, GCAP);
		dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);

		chip->align_buffer_size = 1;

		/* read number of streams from GCAP register instead of using
		* hardcoded value
		*/

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