Commit 6bfa6975 authored by Kalle Valo's avatar Kalle Valo
Browse files

Merge tag 'mt76-for-kvalo-2018-10-13' of https://github.com/nbd168/wireless 

mt76 patches for 4.20

* mt76x0 fixes
* mt76x0e improvements (should be usable now)
* usb support improvements
* more mt76x0/mt76x2 unification work
* minor fix for aggregation + powersave clients
parents 03ce6f8a bbd10586

drivers/net/wireless/mediatek/mt76/mmio.c

+1 −0
Original line number Diff line number Diff line
@@ -79,6 +79,7 @@ void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs) 
		.copy = mt76_mmio_copy,

		.wr_rp = mt76_mmio_wr_rp,

		.rd_rp = mt76_mmio_rd_rp,

		.type = MT76_BUS_MMIO,

	};



	dev->bus = &mt76_mmio_ops;

drivers/net/wireless/mediatek/mt76/mt76.h

+9 −0
Original line number Diff line number Diff line
@@ -38,6 +38,11 @@ struct mt76_reg_pair { 
	u32 value;

};



enum mt76_bus_type {

	MT76_BUS_MMIO,

	MT76_BUS_USB,

};



struct mt76_bus_ops {

	u32 (*rr)(struct mt76_dev *dev, u32 offset);

	void (*wr)(struct mt76_dev *dev, u32 offset, u32 val);
@@ -48,8 +53,12 @@ struct mt76_bus_ops { 
		     const struct mt76_reg_pair *rp, int len);

	int (*rd_rp)(struct mt76_dev *dev, u32 base,

		     struct mt76_reg_pair *rp, int len);

	enum mt76_bus_type type;

};



#define mt76_is_usb(dev) ((dev)->mt76.bus->type == MT76_BUS_USB)

#define mt76_is_mmio(dev) ((dev)->mt76.bus->type == MT76_BUS_MMIO)



enum mt76_txq_id {

	MT_TXQ_VO = IEEE80211_AC_VO,

	MT_TXQ_VI = IEEE80211_AC_VI,

drivers/net/wireless/mediatek/mt76/mt76x0/dma.h

deleted100644 → 0
+0 −126
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>

 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2

 * as published by the Free Software Foundation

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#ifndef __MT76X0U_DMA_H

#define __MT76X0U_DMA_H



#include <asm/unaligned.h>

#include <linux/skbuff.h>



#define MT_DMA_HDR_LEN			4

#define MT_RX_INFO_LEN			4

#define MT_FCE_INFO_LEN			4

#define MT_DMA_HDRS			(MT_DMA_HDR_LEN + MT_RX_INFO_LEN)



/* Common Tx DMA descriptor fields */

#define MT_TXD_INFO_LEN		GENMASK(15, 0)

#define MT_TXD_INFO_D_PORT	GENMASK(29, 27)

#define MT_TXD_INFO_TYPE	GENMASK(31, 30)



/* Tx DMA MCU command specific flags */

#define MT_TXD_CMD_SEQ		GENMASK(19, 16)

#define MT_TXD_CMD_TYPE		GENMASK(26, 20)



enum mt76_msg_port {

	WLAN_PORT,

	CPU_RX_PORT,

	CPU_TX_PORT,

	HOST_PORT,

	VIRTUAL_CPU_RX_PORT,

	VIRTUAL_CPU_TX_PORT,

	DISCARD,

};



enum mt76_info_type {

	DMA_PACKET,

	DMA_COMMAND,

};



/* Tx DMA packet specific flags */

#define MT_TXD_PKT_INFO_NEXT_VLD	BIT(16)

#define MT_TXD_PKT_INFO_TX_BURST	BIT(17)

#define MT_TXD_PKT_INFO_80211		BIT(19)

#define MT_TXD_PKT_INFO_TSO		BIT(20)

#define MT_TXD_PKT_INFO_CSO		BIT(21)

#define MT_TXD_PKT_INFO_WIV		BIT(24)

#define MT_TXD_PKT_INFO_QSEL		GENMASK(26, 25)



enum mt76_qsel {

	MT_QSEL_MGMT,

	MT_QSEL_HCCA,

	MT_QSEL_EDCA,

	MT_QSEL_EDCA_2,

};





static inline int mt76x0_dma_skb_wrap(struct sk_buff *skb,

				       enum mt76_msg_port d_port,

				       enum mt76_info_type type, u32 flags)

{

	u32 info;



	/* Buffer layout:

	 *	|   4B   | xfer len |      pad       |  4B  |

	 *	| TXINFO | pkt/cmd  | zero pad to 4B | zero |

	 *

	 * length field of TXINFO should be set to 'xfer len'.

	 */



	info = flags |

		FIELD_PREP(MT_TXD_INFO_LEN, round_up(skb->len, 4)) |

		FIELD_PREP(MT_TXD_INFO_D_PORT, d_port) |

		FIELD_PREP(MT_TXD_INFO_TYPE, type);



	put_unaligned_le32(info, skb_push(skb, sizeof(info)));

	return skb_put_padto(skb, round_up(skb->len, 4) + 4);

}



static inline int

mt76x0_dma_skb_wrap_pkt(struct sk_buff *skb, enum mt76_qsel qsel, u32 flags)

{

	flags |= FIELD_PREP(MT_TXD_PKT_INFO_QSEL, qsel);

	return mt76x0_dma_skb_wrap(skb, WLAN_PORT, DMA_PACKET, flags);

}



/* Common Rx DMA descriptor fields */

#define MT_RXD_INFO_LEN			GENMASK(13, 0)

#define MT_RXD_INFO_PCIE_INTR		BIT(24)

#define MT_RXD_INFO_QSEL		GENMASK(26, 25)

#define MT_RXD_INFO_PORT		GENMASK(29, 27)

#define MT_RXD_INFO_TYPE		GENMASK(31, 30)



/* Rx DMA packet specific flags */

#define MT_RXD_PKT_INFO_UDP_ERR		BIT(16)

#define MT_RXD_PKT_INFO_TCP_ERR		BIT(17)

#define MT_RXD_PKT_INFO_IP_ERR		BIT(18)

#define MT_RXD_PKT_INFO_PKT_80211	BIT(19)

#define MT_RXD_PKT_INFO_L3L4_DONE	BIT(20)

#define MT_RXD_PKT_INFO_MAC_LEN		GENMASK(23, 21)



/* Rx DMA MCU command specific flags */

#define MT_RXD_CMD_INFO_SELF_GEN	BIT(15)

#define MT_RXD_CMD_INFO_CMD_SEQ		GENMASK(19, 16)

#define MT_RXD_CMD_INFO_EVT_TYPE	GENMASK(23, 20)



enum mt76_evt_type {

	CMD_DONE,

	CMD_ERROR,

	CMD_RETRY,

	EVENT_PWR_RSP,

	EVENT_WOW_RSP,

	EVENT_CARRIER_DETECT_RSP,

	EVENT_DFS_DETECT_RSP,

};



#endif

drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.c

+26 −29
Original line number Diff line number Diff line
@@ -31,8 +31,8 @@ mt76x0_efuse_physical_size_check(struct mt76x02_dev *dev) 
	int ret, i;

	u32 start = 0, end = 0, cnt_free;



	ret = mt76x02_get_efuse_data(&dev->mt76, MT_EE_USAGE_MAP_START,

				     data, sizeof(data), MT_EE_PHYSICAL_READ);

	ret = mt76x02_get_efuse_data(dev, MT_EE_USAGE_MAP_START, data,

				     sizeof(data), MT_EE_PHYSICAL_READ);

	if (ret)

		return ret;
@@ -55,10 +55,10 @@ mt76x0_efuse_physical_size_check(struct mt76x02_dev *dev) 


static void mt76x0_set_chip_cap(struct mt76x02_dev *dev)

{

	u16 nic_conf0 = mt76x02_eeprom_get(&dev->mt76, MT_EE_NIC_CONF_0);

	u16 nic_conf1 = mt76x02_eeprom_get(&dev->mt76, MT_EE_NIC_CONF_1);

	u16 nic_conf0 = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_0);

	u16 nic_conf1 = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_1);



	mt76x02_eeprom_parse_hw_cap(&dev->mt76);

	mt76x02_eeprom_parse_hw_cap(dev);

	dev_dbg(dev->mt76.dev, "2GHz %d 5GHz %d\n",

		dev->mt76.cap.has_2ghz, dev->mt76.cap.has_5ghz);
@@ -86,7 +86,7 @@ static void mt76x0_set_temp_offset(struct mt76x02_dev *dev) 
{

	u8 val;



	val = mt76x02_eeprom_get(&dev->mt76, MT_EE_2G_TARGET_POWER) >> 8;

	val = mt76x02_eeprom_get(dev, MT_EE_2G_TARGET_POWER) >> 8;

	if (mt76x02_field_valid(val))

		dev->cal.rx.temp_offset = mt76x02_sign_extend(val, 8);

	else
@@ -98,12 +98,12 @@ static void mt76x0_set_freq_offset(struct mt76x02_dev *dev) 
	struct mt76x02_rx_freq_cal *caldata = &dev->cal.rx;

	u8 val;



	val = mt76x02_eeprom_get(&dev->mt76, MT_EE_FREQ_OFFSET);

	val = mt76x02_eeprom_get(dev, MT_EE_FREQ_OFFSET);

	if (!mt76x02_field_valid(val))

		val = 0;

	caldata->freq_offset = val;



	val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TSSI_BOUND4) >> 8;

	val = mt76x02_eeprom_get(dev, MT_EE_TSSI_BOUND4) >> 8;

	if (!mt76x02_field_valid(val))

		val = 0;
@@ -118,10 +118,8 @@ void mt76x0_read_rx_gain(struct mt76x02_dev *dev) 
	u16 rssi_offset;

	int i;



	mt76x02_get_rx_gain(&dev->mt76, chan->band, &rssi_offset,

			    &lna_2g, lna_5g);

	caldata->lna_gain = mt76x02_get_lna_gain(&dev->mt76, &lna_2g,

						 lna_5g, chan);

	mt76x02_get_rx_gain(dev, chan->band, &rssi_offset, &lna_2g, lna_5g);

	caldata->lna_gain = mt76x02_get_lna_gain(dev, &lna_2g, lna_5g, chan);



	for (i = 0; i < ARRAY_SIZE(caldata->rssi_offset); i++) {

		val = rssi_offset >> (8 * i);
@@ -132,12 +130,12 @@ void mt76x0_read_rx_gain(struct mt76x02_dev *dev) 
	}

}



static s8 mt76x0_get_delta(struct mt76_dev *dev)

static s8 mt76x0_get_delta(struct mt76x02_dev *dev)

{

	struct cfg80211_chan_def *chandef = &dev->chandef;

	struct cfg80211_chan_def *chandef = &dev->mt76.chandef;

	u8 val;



	if (mt76x02_tssi_enabled(dev))

	if (mt76x0_tssi_enabled(dev))

		return 0;



	if (chandef->width == NL80211_CHAN_WIDTH_80) {
@@ -162,54 +160,54 @@ void mt76x0_get_tx_power_per_rate(struct mt76x02_dev *dev) 
	struct ieee80211_channel *chan = dev->mt76.chandef.chan;

	bool is_2ghz = chan->band == NL80211_BAND_2GHZ;

	struct mt76_rate_power *t = &dev->mt76.rate_power;

	s8 delta = mt76x0_get_delta(&dev->mt76);

	s8 delta = mt76x0_get_delta(dev);

	u16 val, addr;



	memset(t, 0, sizeof(*t));



	/* cck 1M, 2M, 5.5M, 11M */

	val = mt76x02_eeprom_get(&dev->mt76, MT_EE_TX_POWER_BYRATE_BASE);

	val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_BYRATE_BASE);

	t->cck[0] = t->cck[1] = s6_to_s8(val);

	t->cck[2] = t->cck[3] = s6_to_s8(val >> 8);



	/* ofdm 6M, 9M, 12M, 18M */

	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 2 : 0x120;

	val = mt76x02_eeprom_get(&dev->mt76, addr);

	val = mt76x02_eeprom_get(dev, addr);

	t->ofdm[0] = t->ofdm[1] = s6_to_s8(val);

	t->ofdm[2] = t->ofdm[3] = s6_to_s8(val >> 8);



	/* ofdm 24M, 36M, 48M, 54M */

	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 4 : 0x122;

	val = mt76x02_eeprom_get(&dev->mt76, addr);

	val = mt76x02_eeprom_get(dev, addr);

	t->ofdm[4] = t->ofdm[5] = s6_to_s8(val);

	t->ofdm[6] = t->ofdm[7] = s6_to_s8(val >> 8);



	/* ht-vht mcs 1ss 0, 1, 2, 3 */

	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 6 : 0x124;

	val = mt76x02_eeprom_get(&dev->mt76, addr);

	val = mt76x02_eeprom_get(dev, addr);

	t->ht[0] = t->ht[1] = t->vht[0] = t->vht[1] = s6_to_s8(val);

	t->ht[2] = t->ht[3] = t->vht[2] = t->vht[3] = s6_to_s8(val >> 8);



	/* ht-vht mcs 1ss 4, 5, 6 */

	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 8 : 0x126;

	val = mt76x02_eeprom_get(&dev->mt76, addr);

	val = mt76x02_eeprom_get(dev, addr);

	t->ht[4] = t->ht[5] = t->vht[4] = t->vht[5] = s6_to_s8(val);

	t->ht[6] = t->vht[6] = s6_to_s8(val >> 8);



	/* ht-vht mcs 1ss 0, 1, 2, 3 stbc */

	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 14 : 0xec;

	val = mt76x02_eeprom_get(&dev->mt76, addr);

	val = mt76x02_eeprom_get(dev, addr);

	t->stbc[0] = t->stbc[1] = s6_to_s8(val);

	t->stbc[2] = t->stbc[3] = s6_to_s8(val >> 8);



	/* ht-vht mcs 1ss 4, 5, 6 stbc */

	addr = is_2ghz ? MT_EE_TX_POWER_BYRATE_BASE + 16 : 0xee;

	val = mt76x02_eeprom_get(&dev->mt76, addr);

	val = mt76x02_eeprom_get(dev, addr);

	t->stbc[4] = t->stbc[5] = s6_to_s8(val);

	t->stbc[6] = t->stbc[7] = s6_to_s8(val >> 8);



	/* vht mcs 8, 9 5GHz */

	val = mt76x02_eeprom_get(&dev->mt76, 0x132);

	val = mt76x02_eeprom_get(dev, 0x132);

	t->vht[7] = s6_to_s8(val);

	t->vht[8] = s6_to_s8(val >> 8);
@@ -266,7 +264,7 @@ void mt76x0_get_power_info(struct mt76x02_dev *dev, u8 *info) 
		addr = MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE + 2 + offset;

	}



	data = mt76x02_eeprom_get(&dev->mt76, addr);

	data = mt76x02_eeprom_get(dev, addr);



	info[0] = data;

	if (!info[0] || info[0] > 0x3f)
@@ -312,7 +310,7 @@ static int mt76x0_load_eeprom(struct mt76x02_dev *dev) 
	if (found < 0)

		return found;



	return mt76x02_get_efuse_data(&dev->mt76, 0, dev->mt76.eeprom.data,

	return mt76x02_get_efuse_data(dev, 0, dev->mt76.eeprom.data,

				      MT76X0_EEPROM_SIZE, MT_EE_READ);

}
@@ -326,7 +324,7 @@ int mt76x0_eeprom_init(struct mt76x02_dev *dev) 
	if (err < 0)

		return err;



	data = mt76x02_eeprom_get(&dev->mt76, MT_EE_VERSION);

	data = mt76x02_eeprom_get(dev, MT_EE_VERSION);

	version = data >> 8;

	fae = data;
@@ -337,8 +335,7 @@ int mt76x0_eeprom_init(struct mt76x02_dev *dev) 
	dev_info(dev->mt76.dev, "EEPROM ver:%02hhx fae:%02hhx\n",

		 version, fae);



	mt76x02_mac_setaddr(&dev->mt76,

			    dev->mt76.eeprom.data + MT_EE_MAC_ADDR);

	mt76x02_mac_setaddr(dev, dev->mt76.eeprom.data + MT_EE_MAC_ADDR);

	mt76x0_set_chip_cap(dev);

	mt76x0_set_freq_offset(dev);

	mt76x0_set_temp_offset(dev);

drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.h

+6 −0
Original line number Diff line number Diff line
@@ -37,4 +37,10 @@ static inline s8 s6_to_s8(u32 val) 
	return ret;

}



static inline bool mt76x0_tssi_enabled(struct mt76x02_dev *dev)

{

	return (mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_1) &

		MT_EE_NIC_CONF_1_TX_ALC_EN);

}



#endif

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