Commit 6b7275c8 authored by Andy Shevchenko's avatar Andy Shevchenko
Browse files

pinctrl: sunrisepoint: Fix PAD lock register offset for SPT-H 



It appears that SPT-H variant has different offset for PAD locking registers.
Fix it here.

Fixes: 551fa580 ("pinctrl: intel: sunrisepoint: Add Intel Sunrisepoint-H support")
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
parent 8f3d9f35

drivers/pinctrl/intel/pinctrl-sunrisepoint.c

+8 −7
Original line number Diff line number Diff line
@@ -16,7 +16,8 @@ 
#include "pinctrl-intel.h"



#define SPT_PAD_OWN		0x020

#define SPT_PADCFGLOCK	0x0a0

#define SPT_H_PADCFGLOCK	0x090

#define SPT_LP_PADCFGLOCK	0x0a0

#define SPT_HOSTSW_OWN		0x0d0

#define SPT_GPI_IS		0x100

#define SPT_GPI_IE		0x120
@@ -25,7 +26,7 @@ 
	{						\

		.barno = (b),				\

		.padown_offset = SPT_PAD_OWN,		\

		.padcfglock_offset = SPT_PADCFGLOCK,	\

		.padcfglock_offset = SPT_LP_PADCFGLOCK,	\

		.hostown_offset = SPT_HOSTSW_OWN,	\

		.is_offset = SPT_GPI_IS,		\

		.ie_offset = SPT_GPI_IE,		\
@@ -47,7 +48,7 @@ 
	{						\

		.barno = (b),				\

		.padown_offset = SPT_PAD_OWN,		\

		.padcfglock_offset = SPT_PADCFGLOCK,	\

		.padcfglock_offset = SPT_H_PADCFGLOCK,	\

		.hostown_offset = SPT_HOSTSW_OWN,	\

		.is_offset = SPT_GPI_IS,		\

		.ie_offset = SPT_GPI_IE,		\

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