Documentation: Add powerpc options for spec_store_bypass_disable (6b4c1360) · Commits · 戴 / test

Document the support for spec_store_bypass_disable that was added for powerpc in commit ("powerpc/64s: Add support for a store forwarding barrier at kernel entry/exit"). Signed-off-by:

Michael Ellerman <mpe@ellerman.id.au> Reviewed-by:

Kees Cook <keescook@chromium.org> Acked-by:

Thomas Gleixner <tglx@linutronix.de> Signed-off-by:

Jonathan Corbet <corbet@lwn.net>

Documentation/admin-guide/kernel-parameters.txt

+13 −3

Original line number	Diff line number	Diff line
		@@ -4060,6 +4060,8 @@
		This parameter controls whether the Speculative Store
		Bypass optimization is used.

		On x86 the options are:

		on - Unconditionally disable Speculative Store Bypass
		off - Unconditionally enable Speculative Store Bypass
		auto - Kernel detects whether the CPU model contains an
		@@ -4075,12 +4077,20 @@
		seccomp - Same as "prctl" above, but all seccomp threads
		will disable SSB unless they explicitly opt out.

		Not specifying this option is equivalent to
		spec_store_bypass_disable=auto.

		Default mitigations:
		X86: If CONFIG_SECCOMP=y "seccomp", otherwise "prctl"

		On powerpc the options are:

		on,auto - On Power8 and Power9 insert a store-forwarding
		barrier on kernel entry and exit. On Power7
		perform a software flush on kernel entry and
		exit.
		off - No action.

		Not specifying this option is equivalent to
		spec_store_bypass_disable=auto.

		spia_io_base= [HW,MTD]
		spia_fio_base=
		spia_pedr=

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