Commit 6b3142b2 authored by Stefan Agner's avatar Stefan Agner Committed by Russell King
Browse files

ARM: 8612/1: LPAE: initialize cache policy correctly 



The cachepolicy variable gets initialized using a masked pmd
value. So far, the pmd has been masked with flags valid for the
2-page table format, but the 3-page table format requires a
different mask. On LPAE, this lead to a wrong assumption of what
initial cache policy has been used. Later a check forces the
cache policy to writealloc and prints the following warning:
Forcing write-allocate cache policy for SMP

This patch introduces a new definition PMD_SECT_CACHE_MASK for
both page table formats which masks in all cache flags in both
cases.

Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 1feafd64

arch/arm/include/asm/pgtable-2level-hwdef.h

+1 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ 
#define PMD_SECT_WB		(PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)

#define PMD_SECT_MINICACHE	(PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE)

#define PMD_SECT_WBWA		(PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)

#define PMD_SECT_CACHE_MASK	(PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)

#define PMD_SECT_NONSHARED_DEV	(PMD_SECT_TEX(2))



/*

arch/arm/include/asm/pgtable-3level-hwdef.h

+1 −0
Original line number Diff line number Diff line
@@ -62,6 +62,7 @@ 
#define PMD_SECT_WT		(_AT(pmdval_t, 2) << 2)	/* normal inner write-through */

#define PMD_SECT_WB		(_AT(pmdval_t, 3) << 2)	/* normal inner write-back */

#define PMD_SECT_WBWA		(_AT(pmdval_t, 7) << 2)	/* normal inner write-alloc */

#define PMD_SECT_CACHE_MASK	(_AT(pmdval_t, 7) << 2)



/*

 * + Level 3 descriptor (PTE)

arch/arm/mm/mmu.c

+1 −1
Original line number Diff line number Diff line
@@ -137,7 +137,7 @@ void __init init_default_cache_policy(unsigned long pmd) 


	initial_pmd_value = pmd;



	pmd &= PMD_SECT_TEX(1) | PMD_SECT_BUFFERABLE | PMD_SECT_CACHEABLE;

	pmd &= PMD_SECT_CACHE_MASK;



	for (i = 0; i < ARRAY_SIZE(cache_policies); i++)

		if (cache_policies[i].pmd == pmd) {

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