arm64: dts: imx8qxp: enable scu general irq channel (6b2bcbd8) · Commits · 戴 / test

On i.MX8QXP, SCU uses MU1 general interrupt channel #3 to notify user for IRQs of RTC alarm, thermal alarm and WDOG etc., mailbox RX doorbell mode is used for this function, this patch adds support for it. Signed-off-by:

Anson Huang <Anson.Huang@nxp.com> Reviewed-by:

Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by:

Shawn Guo <shawnguo@kernel.org>

arch/arm64/boot/dts/freescale/imx8qxp.dtsi

+5 −2

Original line number	Diff line number	Diff line
		@@ -21,6 +21,7 @@
		mmc1 = &usdhc2;
		mmc2 = &usdhc3;
		serial0 = &adma_lpuart0;
		mu1 = &lsio_mu1;
		};

		cpus {
		@@ -117,7 +118,8 @@
		scu {
		compatible = "fsl,imx-scu";
		mbox-names = "tx0", "tx1", "tx2", "tx3",
		"rx0", "rx1", "rx2", "rx3";
		"rx0", "rx1", "rx2", "rx3",
		"gip3";
		mboxes = <&lsio_mu1 0 0
		&lsio_mu1 0 1
		&lsio_mu1 0 2
		@@ -125,7 +127,8 @@
		&lsio_mu1 1 0
		&lsio_mu1 1 1
		&lsio_mu1 1 2
		&lsio_mu1 1 3>;
		&lsio_mu1 1 3
		&lsio_mu1 3 3>;

		clk: clock-controller {
		compatible = "fsl,imx8qxp-clk";

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