Commit 6b0d1abb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm 

A few more things this time around.  The only thing warranting some
commentry is the modpost change, which allows folk building a Thumb2
enabled kernel to see section mismatch warnings.  This is why many
weren't noticed with OMAP.

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM/audit: include audit header and fix audit arch
  ARM: OMAP: fix voltage domain build errors with PM_OPP disabled
  ARM/PCI: Remove ARM's duplicate definition of 'pcibios_max_latency'
  ARM: 7336/1: smp_twd: Don't register CPUFREQ notifiers if local timers are not initialised
  ARM: 7327/1: need to include asm/system.h in asm/processor.h
  ARM: 7326/2: PL330: fix null pointer dereference in pl330_chan_ctrl()
  ARM: 7164/3: PL330: Fix the size of the dst_cache_ctrl field
  ARM: 7325/1: fix v7 boot with lockdep enabled
  ARM: 7324/1: modpost: Fix section warnings for ARM for many compilers
  ARM: 7323/1: Do not allow ARM_LPAE on pre-ARMv7 architectures
parents faf30900 5180bb39

arch/arm/common/it8152.c

+0 −7
Original line number Diff line number Diff line
@@ -320,13 +320,6 @@ err0: 
	return -EBUSY;

}



/*

 * If we set up a device for bus mastering, we need to check the latency

 * timer as we don't have even crappy BIOSes to set it properly.

 * The implementation is from arch/i386/pci/i386.c

 */

unsigned int pcibios_max_latency = 255;



/* ITE bridge requires setting latency timer to avoid early bus access

   termination by PCI bus master devices

*/

arch/arm/common/pl330.c

+2 −1
Original line number Diff line number Diff line
@@ -1502,12 +1502,13 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op) 
	struct pl330_thread *thrd = ch_id;

	struct pl330_dmac *pl330;

	unsigned long flags;

	int ret = 0, active = thrd->req_running;

	int ret = 0, active;



	if (!thrd || thrd->free || thrd->dmac->state == DYING)

		return -EINVAL;



	pl330 = thrd->dmac;

	active = thrd->req_running;



	spin_lock_irqsave(&pl330->lock, flags);

arch/arm/include/asm/assembler.h

+5 −0
Original line number Diff line number Diff line
@@ -137,6 +137,11 @@ 
	disable_irq

	.endm



	.macro	save_and_disable_irqs_notrace, oldcpsr

	mrs	\oldcpsr, cpsr

	disable_irq_notrace

	.endm



/*

 * Restore interrupt state previously stored in a register.  We don't

 * guarantee that this will preserve the flags.

arch/arm/include/asm/hardware/pl330.h

+1 −1
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ enum pl330_dstcachectrl { 
	DCCTRL1, /* Bufferable only */

	DCCTRL2, /* Cacheable, but do not allocate */

	DCCTRL3, /* Cacheable and bufferable, but do not allocate */

	DINVALID1 = 8,

	DINVALID1,              /* AWCACHE = 0x1000 */

	DINVALID2,

	DCCTRL6, /* Cacheable write-through, allocate on writes only */

	DCCTRL7, /* Cacheable write-back, allocate on writes only */

arch/arm/include/asm/processor.h

+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#include <asm/hw_breakpoint.h>

#include <asm/ptrace.h>

#include <asm/types.h>

#include <asm/system.h>



#ifdef __KERNEL__

#define STACK_TOP	((current->personality & ADDR_LIMIT_32BIT) ? \

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