Commit 6ae72bfa authored by Yicong Yang's avatar Yicong Yang Committed by Bjorn Helgaas
Browse files

PCI: Unify pcie_find_root_port() and pci_find_pcie_root_port() 

Previously we used pcie_find_root_port() to find a Root Port from a PCIe
device and pci_find_pcie_root_port() to find a Root Port from a
Conventional PCI device.

Unify the two functions and use pcie_find_root_port() to find a Root Port
from either a Conventional PCI device or a PCIe device.  Then there is no
need to distinguish the type of the device.

Link: https://lore.kernel.org/r/1589019568-5216-1-git-send-email-yangyicong@hisilicon.com


Signed-off-by: default avatarYicong Yang <yangyicong@hisilicon.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: Kalle Valo <kvalo@codeaurora.org> # wireless
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> # thunderbolt
parent 914a1951

drivers/pci/pci-acpi.c

+1 −1
Original line number Diff line number Diff line
@@ -948,7 +948,7 @@ static bool acpi_pci_bridge_d3(struct pci_dev *dev) 
	 * Look for a special _DSD property for the root port and if it

	 * is set we know the hierarchy behind it supports D3 just fine.

	 */

	root = pci_find_pcie_root_port(dev);

	root = pcie_find_root_port(dev);

	if (!root)

		return false;

drivers/pci/pci.c

+0 −24
Original line number Diff line number Diff line
@@ -751,30 +751,6 @@ struct resource *pci_find_resource(struct pci_dev *dev, struct resource *res) 
}

EXPORT_SYMBOL(pci_find_resource);



/**

 * pci_find_pcie_root_port - return PCIe Root Port

 * @dev: PCI device to query

 *

 * Traverse up the parent chain and return the PCIe Root Port PCI Device

 * for a given PCI Device.

 */

struct pci_dev *pci_find_pcie_root_port(struct pci_dev *dev)

{

	struct pci_dev *bridge, *highest_pcie_bridge = dev;



	bridge = pci_upstream_bridge(dev);

	while (bridge && pci_is_pcie(bridge)) {

		highest_pcie_bridge = bridge;

		bridge = pci_upstream_bridge(bridge);

	}



	if (pci_pcie_type(highest_pcie_bridge) != PCI_EXP_TYPE_ROOT_PORT)

		return NULL;



	return highest_pcie_bridge;

}

EXPORT_SYMBOL(pci_find_pcie_root_port);



/**

 * pci_wait_for_pending - wait for @mask bit(s) to clear in status word @pos

 * @dev: the PCI device to operate on

drivers/pci/probe.c

+1 −1
Original line number Diff line number Diff line
@@ -2056,7 +2056,7 @@ static void pci_configure_relaxed_ordering(struct pci_dev *dev) 
	 * For now, we only deal with Relaxed Ordering issues with Root

	 * Ports. Peer-to-Peer DMA is another can of worms.

	 */

	root = pci_find_pcie_root_port(dev);

	root = pcie_find_root_port(dev);

	if (!root)

		return;

drivers/pci/quirks.c

+1 −1
Original line number Diff line number Diff line
@@ -4319,7 +4319,7 @@ DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_AMD, 0x1a02, PCI_CLASS_NOT_DEFINED, 
 */

static void quirk_disable_root_port_attributes(struct pci_dev *pdev)

{

	struct pci_dev *root_port = pci_find_pcie_root_port(pdev);

	struct pci_dev *root_port = pcie_find_root_port(pdev);



	if (!root_port) {

		pci_warn(pdev, "PCIe Completion erratum may cause device errors\n");

drivers/thunderbolt/switch.c

+2 −2
Original line number Diff line number Diff line
@@ -263,7 +263,7 @@ static void nvm_authenticate_start_dma_port(struct tb_switch *sw) 
	 * itself. To be on the safe side keep the root port in D0 during

	 * the whole upgrade process.

	 */

	root_port = pci_find_pcie_root_port(sw->tb->nhi->pdev);

	root_port = pcie_find_root_port(sw->tb->nhi->pdev);

	if (root_port)

		pm_runtime_get_noresume(&root_port->dev);

}
@@ -272,7 +272,7 @@ static void nvm_authenticate_complete_dma_port(struct tb_switch *sw) 
{

	struct pci_dev *root_port;



	root_port = pci_find_pcie_root_port(sw->tb->nhi->pdev);

	root_port = pcie_find_root_port(sw->tb->nhi->pdev);

	if (root_port)

		pm_runtime_put(&root_port->dev);

}

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