Unverified Commit 6ababfc0 authored by Pierre-Louis Bossart's avatar Pierre-Louis Bossart Committed by Mark Brown
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ASoC: fsl: fsl_ssi: fix kernel-doc



Fix W=1 warnings. The kernel-doc support is partial, add more
descriptions and follow proper syntax

Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Acked-by: default avatarNicolin Chen <nicoleotsuka@gmail.com>
Link: https://lore.kernel.org/r/20200702192141.168018-3-pierre-louis.bossart@linux.intel.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 8182fa9a
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+44 −26
Original line number Diff line number Diff line
@@ -203,12 +203,10 @@ struct fsl_ssi_soc_data {
};

/**
 * fsl_ssi: per-SSI private data
 *
 * struct fsl_ssi - per-SSI private data
 * @regs: Pointer to the regmap registers
 * @irq: IRQ of this SSI
 * @cpu_dai_drv: CPU DAI driver for this device
 *
 * @dai_fmt: DAI configuration this device is currently used with
 * @streams: Mask of current active streams: BIT(TX) and BIT(RX)
 * @i2s_net: I2S and Network mode configurations of SCR register
@@ -221,38 +219,29 @@ struct fsl_ssi_soc_data {
 * @slot_width: Width of each DAI slot
 * @slots: Number of slots
 * @regvals: Specific RX/TX register settings
 *
 * @clk: Clock source to access register
 * @baudclk: Clock source to generate bit and frame-sync clocks
 * @baudclk_streams: Active streams that are using baudclk
 *
 * @regcache_sfcsr: Cache sfcsr register value during suspend and resume
 * @regcache_sacnt: Cache sacnt register value during suspend and resume
 *
 * @dma_params_tx: DMA transmit parameters
 * @dma_params_rx: DMA receive parameters
 * @ssi_phys: physical address of the SSI registers
 *
 * @fiq_params: FIQ stream filtering parameters
 *
 * @card_pdev: Platform_device pointer to register a sound card for PowerPC or
 *             to register a CODEC platform device for AC97
 * @card_name: Platform_device name to register a sound card for PowerPC or
 *             to register a CODEC platform device for AC97
 * @card_idx: The index of SSI to register a sound card for PowerPC or
 *            to register a CODEC platform device for AC97
 *
 * @dbg_stats: Debugging statistics
 *
 * @soc: SoC specific data
 * @dev: Pointer to &pdev->dev
 *
 * @fifo_watermark: The FIFO watermark setting. Notifies DMA when there are
 *                  @fifo_watermark or fewer words in TX fifo or
 *                  @fifo_watermark or more empty words in RX fifo.
 * @dma_maxburst: Max number of words to transfer in one go. So far,
 *                this is always the same as fifo_watermark.
 *
 * @ac97_reg_lock: Mutex lock to serialize AC97 register access operations
 */
struct fsl_ssi {
@@ -374,7 +363,9 @@ static bool fsl_ssi_is_i2s_cbm_cfs(struct fsl_ssi *ssi)
}

/**
 * Interrupt handler to gather states
 * fsl_ssi_irq - Interrupt handler to gather states
 * @irq: irq number
 * @dev_id: context
 */
static irqreturn_t fsl_ssi_isr(int irq, void *dev_id)
{
@@ -395,7 +386,10 @@ static irqreturn_t fsl_ssi_isr(int irq, void *dev_id)
}

/**
 * Set SCR, SIER, STCR and SRCR registers with cached values in regvals
 * fsl_ssi_config_enable - Set SCR, SIER, STCR and SRCR registers with
 * cached values in regvals
 * @ssi: SSI context
 * @tx: direction
 *
 * Notes:
 * 1) For offline_config SoCs, enable all necessary bits of both streams
@@ -474,7 +468,7 @@ enable_scr:
	ssi->streams |= BIT(dir);
}

/**
/*
 * Exclude bits that are used by the opposite stream
 *
 * When both streams are active, disabling some bits for the current stream
@@ -495,7 +489,10 @@ enable_scr:
	((vals) & _ssi_xor_shared_bits(vals, avals, aactive))

/**
 * Unset SCR, SIER, STCR and SRCR registers with cached values in regvals
 * fsl_ssi_config_disable - Unset SCR, SIER, STCR and SRCR registers
 * with cached values in regvals
 * @ssi: SSI context
 * @tx: direction
 *
 * Notes:
 * 1) For offline_config SoCs, to avoid online reconfigurations, disable all
@@ -577,7 +574,9 @@ static void fsl_ssi_tx_ac97_saccst_setup(struct fsl_ssi *ssi)
}

/**
 * Cache critical bits of SIER, SRCR, STCR and SCR to later set them safely
 * fsl_ssi_setup_regvals - Cache critical bits of SIER, SRCR, STCR and
 * SCR to later set them safely
 * @ssi: SSI context
 */
static void fsl_ssi_setup_regvals(struct fsl_ssi *ssi)
{
@@ -661,9 +660,12 @@ static void fsl_ssi_shutdown(struct snd_pcm_substream *substream,
}

/**
 * Configure Digital Audio Interface bit clock
 * fsl_ssi_set_bclk - Configure Digital Audio Interface bit clock
 * @substream: ASoC substream
 * @dai: pointer to DAI
 * @hw_params: pointers to hw_params
 *
 * Note: This function can be only called when using SSI as DAI master
 * Notes: This function can be only called when using SSI as DAI master
 *
 * Quick instruction for parameters:
 * freq: Output BCLK frequency = samplerate * slots * slot_width
@@ -782,7 +784,10 @@ static int fsl_ssi_set_bclk(struct snd_pcm_substream *substream,
}

/**
 * Configure SSI based on PCM hardware parameters
 * fsl_ssi_hw_params - Configure SSI based on PCM hardware parameters
 * @substream: ASoC substream
 * @hw_params: pointers to hw_params
 * @dai: pointer to DAI
 *
 * Notes:
 * 1) SxCCR.WL bits are critical bits that require SSI to be temporarily
@@ -997,7 +1002,9 @@ static int _fsl_ssi_set_dai_fmt(struct fsl_ssi *ssi, unsigned int fmt)
}

/**
 * Configure Digital Audio Interface (DAI) Format
 * fsl_ssi_set_dai_fmt - Configure Digital Audio Interface (DAI) Format
 * @dai: pointer to DAI
 * @fmt: format mask
 */
static int fsl_ssi_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
@@ -1011,7 +1018,12 @@ static int fsl_ssi_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
}

/**
 * Set TDM slot number and slot width
 * fsl_ssi_set_dai_tdm_slot - Set TDM slot number and slot width
 * @dai: pointer to DAI
 * @tx_mask: mask for TX
 * @rx_mask: mask for RX
 * @slots: number of slots
 * @slot_width: number of bits per slot
 */
static int fsl_ssi_set_dai_tdm_slot(struct snd_soc_dai *dai, u32 tx_mask,
				    u32 rx_mask, int slots, int slot_width)
@@ -1055,7 +1067,10 @@ static int fsl_ssi_set_dai_tdm_slot(struct snd_soc_dai *dai, u32 tx_mask,
}

/**
 * Start or stop SSI and corresponding DMA transaction.
 * fsl_ssi_trigger - Start or stop SSI and corresponding DMA transaction.
 * @substream: ASoC substream
 * @cmd: trigger command
 * @dai: pointer to DAI
 *
 * The DMA channel is in external master start and pause mode, which
 * means the SSI completely controls the flow of data.
@@ -1239,7 +1254,8 @@ static struct snd_ac97_bus_ops fsl_ssi_ac97_ops = {
};

/**
 * Initialize SSI registers
 * fsl_ssi_hw_init - Initialize SSI registers
 * @ssi: SSI context
 */
static int fsl_ssi_hw_init(struct fsl_ssi *ssi)
{
@@ -1268,7 +1284,8 @@ static int fsl_ssi_hw_init(struct fsl_ssi *ssi)
}

/**
 * Clear SSI registers
 * fsl_ssi_hw_clean - Clear SSI registers
 * @ssi: SSI context
 */
static void fsl_ssi_hw_clean(struct fsl_ssi *ssi)
{
@@ -1285,7 +1302,8 @@ static void fsl_ssi_hw_clean(struct fsl_ssi *ssi)
		regmap_update_bits(ssi->regs, REG_SSI_SCR, SSI_SCR_SSIEN, 0);
	}
}
/**

/*
 * Make every character in a string lower-case
 */
static void make_lowercase(char *s)