Commit 6a9b490d authored by David S. Miller's avatar David S. Miller
Browse files

[SPARC64]: Move DCACHE_ALIASING_POSSIBLE define to asm/page.h 



This showed that arch/sparc64/kernel/ptrace.c was not getting
the define properly, and thus the code protected by this ifdef
was never actually compiled before.  So fix that too.

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e0487992

arch/sparc64/kernel/ptrace.c

+4 −3
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
#include <asm/psrcompat.h>

#include <asm/visasm.h>

#include <asm/spitfire.h>

#include <asm/page.h>



/* Returning from ptrace is a bit tricky because the syscall return

 * low level code assumes any value returned which is negative and
@@ -128,20 +129,20 @@ void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, 
	 * is mapped to in the user's address space, we can skip the

	 * D-cache flush.

	 */

	if ((uaddr ^ kaddr) & (1UL << 13)) {

	if ((uaddr ^ (unsigned long) kaddr) & (1UL << 13)) {

		unsigned long start = __pa(kaddr);

		unsigned long end = start + len;



		if (tlb_type == spitfire) {

			for (; start < end; start += 32)

				spitfire_put_dcache_tag(va & 0x3fe0, 0x0);

				spitfire_put_dcache_tag(start & 0x3fe0, 0x0);

		} else {

			for (; start < end; start += 32)

				__asm__ __volatile__(

					"stxa %%g0, [%0] %1\n\t"

					"membar #Sync"

					: /* no outputs */

					: "r" (va),

					: "r" (start),

					"i" (ASI_DCACHE_INVALIDATE));

		}

	}

include/asm-sparc64/cacheflush.h

+0 −7
Original line number Diff line number Diff line
@@ -4,13 +4,6 @@ 
#include <linux/config.h>

#include <asm/page.h>



/* Flushing for D-cache alias handling is only needed if

 * the page size is smaller than 16K.

 */

#if PAGE_SHIFT < 14

#define DCACHE_ALIASING_POSSIBLE

#endif



#ifndef __ASSEMBLY__



#include <linux/mm.h>

include/asm-sparc64/ide.h

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ 
#include <asm/io.h>

#include <asm/spitfire.h>

#include <asm/cacheflush.h>

#include <asm/page.h>



#ifndef MAX_HWIFS

# ifdef CONFIG_BLK_DEV_IDEPCI

include/asm-sparc64/page.h

+7 −0
Original line number Diff line number Diff line
@@ -21,6 +21,13 @@ 
#define PAGE_SIZE    (_AC(1,UL) << PAGE_SHIFT)

#define PAGE_MASK    (~(PAGE_SIZE-1))



/* Flushing for D-cache alias handling is only needed if

 * the page size is smaller than 16K.

 */

#if PAGE_SHIFT < 14

#define DCACHE_ALIASING_POSSIBLE

#endif



#ifdef __KERNEL__



#ifndef __ASSEMBLY__

include/asm-sparc64/pgalloc.h

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <asm/spitfire.h>

#include <asm/cpudata.h>

#include <asm/cacheflush.h>

#include <asm/page.h>



/* Page table allocation/freeing. */

#ifdef CONFIG_SMP

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