Commit 6a8c49fc authored by Koji Matsuoka's avatar Koji Matsuoka Committed by Laurent Pinchart
Browse files

drm: rcar-du: Support up to 4 CRTCs 



The Gen3 R8A7795 DU has 4 CRTCs, support them all.

Signed-off-by: default avatarKoji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
parent dadab320

drivers/gpu/drm/rcar-du/rcar_du_crtc.c

+1 −1
Original line number Diff line number Diff line
@@ -571,7 +571,7 @@ static irqreturn_t rcar_du_crtc_irq(int irq, void *arg) 
int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index)

{

	static const unsigned int mmio_offsets[] = {

		DU0_REG_OFFSET, DU1_REG_OFFSET, DU2_REG_OFFSET

		DU0_REG_OFFSET, DU1_REG_OFFSET, DU2_REG_OFFSET, DU3_REG_OFFSET

	};



	struct rcar_du_device *rcdu = rgrp->dev;

drivers/gpu/drm/rcar-du/rcar_du_drv.h

+1 −1
Original line number Diff line number Diff line
@@ -67,7 +67,7 @@ struct rcar_du_device_info { 
	unsigned int num_lvds;

};



#define RCAR_DU_MAX_CRTCS		3

#define RCAR_DU_MAX_CRTCS		4

#define RCAR_DU_MAX_GROUPS		DIV_ROUND_UP(RCAR_DU_MAX_CRTCS, 2)

#define RCAR_DU_MAX_LVDS		2

#define RCAR_DU_MAX_VSPS		4

drivers/gpu/drm/rcar-du/rcar_du_regs.h

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#define DU0_REG_OFFSET		0x00000

#define DU1_REG_OFFSET		0x30000

#define DU2_REG_OFFSET		0x40000

#define DU3_REG_OFFSET		0x70000



/* -----------------------------------------------------------------------------

 * Display Control Registers

CRA Git | Maintained and supported by SUSTech CRA and CCSE