Commit 6a828b0f authored by James Smart's avatar James Smart Committed by Martin K. Petersen
Browse files

scsi: lpfc: Support non-uniform allocation of MSIX vectors to hardware queues



So far MSIX vector allocation assumed it would be 1:1 with hardware
queues. However, there are several reasons why fewer MSIX vectors may be
allocated than hardware queues such as the platform being out of vectors or
adapter limits being less than cpu count.

This patch reworks the MSIX/EQ relationships with the per-cpu hardware
queues so they can function independently. MSIX vectors will be equitably
split been cpu sockets/cores and then the per-cpu hardware queues will be
mapped to the vectors most efficient for them.

Signed-off-by: default avatarDick Kennedy <dick.kennedy@broadcom.com>
Signed-off-by: default avatarJames Smart <jsmart2021@gmail.com>
Reviewed-by: default avatarHannes Reinecke <hare@suse.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent b3295c2a
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+5 −2
Original line number Diff line number Diff line
@@ -84,8 +84,6 @@ struct lpfc_sli2_slim;
#define LPFC_HB_MBOX_INTERVAL   5	/* Heart beat interval in seconds. */
#define LPFC_HB_MBOX_TIMEOUT    30	/* Heart beat timeout  in seconds. */

#define LPFC_LOOK_AHEAD_OFF	0	/* Look ahead logic is turned off */

/* Error Attention event polling interval */
#define LPFC_ERATT_POLL_INTERVAL	5 /* EATT poll interval in seconds */

@@ -821,6 +819,7 @@ struct lpfc_hba {
	uint32_t cfg_fcp_imax;
	uint32_t cfg_fcp_cpu_map;
	uint32_t cfg_hdw_queue;
	uint32_t cfg_irq_chann;
	uint32_t cfg_suppress_rsp;
	uint32_t cfg_nvme_oas;
	uint32_t cfg_nvme_embed_cmd;
@@ -1042,6 +1041,9 @@ struct lpfc_hba {
	struct dentry *debug_nvmeio_trc;
	struct lpfc_debugfs_nvmeio_trc *nvmeio_trc;
	struct dentry *debug_hdwqinfo;
#ifdef LPFC_HDWQ_LOCK_STAT
	struct dentry *debug_lockstat;
#endif
	atomic_t nvmeio_trc_cnt;
	uint32_t nvmeio_trc_size;
	uint32_t nvmeio_trc_output_idx;
@@ -1161,6 +1163,7 @@ struct lpfc_hba {
#define LPFC_CHECK_NVME_IO	1
#define LPFC_CHECK_NVMET_RCV	2
#define LPFC_CHECK_NVMET_IO	4
#define LPFC_CHECK_SCSI_IO	8
	uint16_t ktime_on;
	uint64_t ktime_data_samples;
	uint64_t ktime_status_samples;
+52 −44
Original line number Diff line number Diff line
@@ -4958,7 +4958,7 @@ lpfc_fcp_imax_store(struct device *dev, struct device_attribute *attr,
	phba->cfg_fcp_imax = (uint32_t)val;
	phba->initial_imax = phba->cfg_fcp_imax;

	for (i = 0; i < phba->cfg_hdw_queue; i += LPFC_MAX_EQ_DELAY_EQID_CNT)
	for (i = 0; i < phba->cfg_irq_chann; i += LPFC_MAX_EQ_DELAY_EQID_CNT)
		lpfc_modify_hba_eq_delay(phba, i, LPFC_MAX_EQ_DELAY_EQID_CNT,
					 val);

@@ -5059,13 +5059,6 @@ lpfc_fcp_cpu_map_show(struct device *dev, struct device_attribute *attr,
				phba->cfg_fcp_cpu_map,
				phba->sli4_hba.num_online_cpu);
		break;
	case 2:
		len += snprintf(buf + len, PAGE_SIZE-len,
				"fcp_cpu_map: Driver centric mapping (%d): "
				"%d online CPUs\n",
				phba->cfg_fcp_cpu_map,
				phba->sli4_hba.num_online_cpu);
		break;
	}

	while (phba->sli4_hba.curr_disp_cpu < phba->sli4_hba.num_present_cpu) {
@@ -5076,35 +5069,35 @@ lpfc_fcp_cpu_map_show(struct device *dev, struct device_attribute *attr,
				len += snprintf(
					buf + len, PAGE_SIZE - len,
					"CPU %02d hdwq None "
					"physid %d coreid %d\n",
					"physid %d coreid %d ht %d\n",
					phba->sli4_hba.curr_disp_cpu,
					cpup->phys_id,
					cpup->core_id);
					cpup->core_id, cpup->hyper);
			else
				len += snprintf(
					buf + len, PAGE_SIZE - len,
					"CPU %02d hdwq %04d "
					"physid %d coreid %d\n",
					"CPU %02d EQ %04d hdwq %04d "
					"physid %d coreid %d ht %d\n",
					phba->sli4_hba.curr_disp_cpu,
					cpup->hdwq, cpup->phys_id,
					cpup->core_id);
					cpup->eq, cpup->hdwq, cpup->phys_id,
					cpup->core_id, cpup->hyper);
		} else {
			if (cpup->hdwq == LPFC_VECTOR_MAP_EMPTY)
				len += snprintf(
					buf + len, PAGE_SIZE - len,
					"CPU %02d hdwq None "
					"physid %d coreid %d IRQ %d\n",
					"physid %d coreid %d ht %d IRQ %d\n",
					phba->sli4_hba.curr_disp_cpu,
					cpup->phys_id,
					cpup->core_id, cpup->irq);
					cpup->core_id, cpup->hyper, cpup->irq);
			else
				len += snprintf(
					buf + len, PAGE_SIZE - len,
					"CPU %02d hdwq %04d "
					"physid %d coreid %d IRQ %d\n",
					"CPU %02d EQ %04d hdwq %04d "
					"physid %d coreid %d ht %d IRQ %d\n",
					phba->sli4_hba.curr_disp_cpu,
					cpup->hdwq, cpup->phys_id,
					cpup->core_id, cpup->irq);
					cpup->eq, cpup->hdwq, cpup->phys_id,
					cpup->core_id, cpup->hyper, cpup->irq);
		}

		phba->sli4_hba.curr_disp_cpu++;
@@ -5146,14 +5139,13 @@ lpfc_fcp_cpu_map_store(struct device *dev, struct device_attribute *attr,
# lpfc_fcp_cpu_map: Defines how to map CPUs to IRQ vectors
# for the HBA.
#
# Value range is [0 to 2]. Default value is LPFC_DRIVER_CPU_MAP (2).
# Value range is [0 to 1]. Default value is LPFC_HBA_CPU_MAP (1).
#	0 - Do not affinitze IRQ vectors
#	1 - Affintize HBA vectors with respect to each HBA
#	    (start with CPU0 for each HBA)
#	2 - Affintize HBA vectors with respect to the entire driver
#	    (round robin thru all CPUs across all HBAs)
# This also defines how Hardware Queues are mapped to specific CPUs.
*/
static int lpfc_fcp_cpu_map = LPFC_DRIVER_CPU_MAP;
static int lpfc_fcp_cpu_map = LPFC_HBA_CPU_MAP;
module_param(lpfc_fcp_cpu_map, int, S_IRUGO|S_IWUSR);
MODULE_PARM_DESC(lpfc_fcp_cpu_map,
		 "Defines how to map CPUs to IRQ vectors per HBA");
@@ -5187,7 +5179,7 @@ lpfc_fcp_cpu_map_init(struct lpfc_hba *phba, int val)
	lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
			"3326 lpfc_fcp_cpu_map: %d out of range, using "
			"default\n", val);
	phba->cfg_fcp_cpu_map = LPFC_DRIVER_CPU_MAP;
	phba->cfg_fcp_cpu_map = LPFC_HBA_CPU_MAP;

	return 0;
}
@@ -5308,7 +5300,7 @@ LPFC_ATTR_R(xri_rebalancing, 1, 0, 1, "Enable/Disable XRI rebalancing");
 * CPU. Otherwise, the default 0 (Round Robin) scheduling of FCP/NVME I/Os
 * through WQs will be used.
 */
LPFC_ATTR_RW(fcp_io_sched, LPFC_FCP_SCHED_BY_HDWQ,
LPFC_ATTR_RW(fcp_io_sched, LPFC_FCP_SCHED_BY_CPU,
	     LPFC_FCP_SCHED_BY_HDWQ,
	     LPFC_FCP_SCHED_BY_CPU,
	     "Determine scheduling algorithm for "
@@ -5474,24 +5466,40 @@ LPFC_ATTR_RW(nvme_embed_cmd, 1, 0, 2,
	     "Embed NVME Command in WQE");

/*
 * lpfc_hdw_queue: Set the number of IO channels the driver
 * lpfc_hdw_queue: Set the number of Hardware Queues the driver
 * will advertise it supports to the NVME and  SCSI layers. This also
 * will map to the number of EQ/CQ/WQs the driver will create.
 * will map to the number of CQ/WQ pairs the driver will create.
 *
 * The NVME Layer will try to create this many, plus 1 administrative
 * hardware queue. The administrative queue will always map to WQ 0
 * A hardware IO queue maps (qidx) to a specific driver WQ.
 * A hardware IO queue maps (qidx) to a specific driver CQ/WQ.
 *
 *      0    = Configure the number of hdw queues to the number of active CPUs.
 *      1,64 = Manually specify how many hdw queues to use.
 *      1,128 = Manually specify how many hdw queues to use.
 *
 * Value range is [0,64]. Default value is 0.
 * Value range is [0,128]. Default value is 0.
 */
LPFC_ATTR_R(hdw_queue,
	    LPFC_HBA_HDWQ_DEF,
	    LPFC_HBA_HDWQ_MIN, LPFC_HBA_HDWQ_MAX,
	    "Set the number of I/O Hardware Queues");

/*
 * lpfc_irq_chann: Set the number of IRQ vectors that are available
 * for Hardware Queues to utilize.  This also will map to the number
 * of EQ / MSI-X vectors the driver will create. This should never be
 * more than the number of Hardware Queues
 *
 *      0     = Configure number of IRQ Channels to the number of active CPUs.
 *      1,128 = Manually specify how many IRQ Channels to use.
 *
 * Value range is [0,128]. Default value is 0.
 */
LPFC_ATTR_R(irq_chann,
	    LPFC_HBA_HDWQ_DEF,
	    LPFC_HBA_HDWQ_MIN, LPFC_HBA_HDWQ_MAX,
	    "Set the number of I/O IRQ Channels");

/*
# lpfc_enable_hba_reset: Allow or prevent HBA resets to the hardware.
#       0  = HBA resets disabled
@@ -5532,16 +5540,6 @@ LPFC_ATTR_RW(XLanePriority, 0, 0x0, 0x7f, "CS_CTL for Express Lane Feature.");
*/
LPFC_ATTR_R(enable_bg, 0, 0, 1, "Enable BlockGuard Support");

/*
# lpfc_fcp_look_ahead: Look ahead for completions in FCP start routine
#       0  = disabled (default)
#       1  = enabled
# Value range is [0,1]. Default value is 0.
#
# This feature in under investigation and may be supported in the future.
*/
unsigned int lpfc_fcp_look_ahead = LPFC_LOOK_AHEAD_OFF;

/*
# lpfc_prot_mask: i
#	- Bit mask of host protection capabilities used to register with the
@@ -5788,6 +5786,7 @@ struct device_attribute *lpfc_hba_attrs[] = {
	&dev_attr_lpfc_fcp_imax,
	&dev_attr_lpfc_fcp_cpu_map,
	&dev_attr_lpfc_hdw_queue,
	&dev_attr_lpfc_irq_chann,
	&dev_attr_lpfc_suppress_rsp,
	&dev_attr_lpfc_nvmet_mrq,
	&dev_attr_lpfc_nvmet_mrq_post,
@@ -6867,6 +6866,7 @@ lpfc_get_cfgparam(struct lpfc_hba *phba)
	lpfc_nvme_enable_fb_init(phba, lpfc_nvme_enable_fb);
	lpfc_nvmet_fb_size_init(phba, lpfc_nvmet_fb_size);
	lpfc_hdw_queue_init(phba, lpfc_hdw_queue);
	lpfc_irq_chann_init(phba, lpfc_irq_chann);
	lpfc_enable_bbcr_init(phba, lpfc_enable_bbcr);
	lpfc_enable_dpp_init(phba, lpfc_enable_dpp);

@@ -6891,6 +6891,10 @@ lpfc_get_cfgparam(struct lpfc_hba *phba)
	/* A value of 0 means use the number of CPUs found in the system */
	if (phba->cfg_hdw_queue == 0)
		phba->cfg_hdw_queue = phba->sli4_hba.num_present_cpu;
	if (phba->cfg_irq_chann == 0)
		phba->cfg_irq_chann = phba->sli4_hba.num_present_cpu;
	if (phba->cfg_irq_chann > phba->cfg_hdw_queue)
		phba->cfg_irq_chann = phba->cfg_hdw_queue;

	phba->cfg_soft_wwnn = 0L;
	phba->cfg_soft_wwpn = 0L;
@@ -6933,6 +6937,10 @@ lpfc_nvme_mod_param_dep(struct lpfc_hba *phba)
{
	if (phba->cfg_hdw_queue > phba->sli4_hba.num_present_cpu)
		phba->cfg_hdw_queue = phba->sli4_hba.num_present_cpu;
	if (phba->cfg_irq_chann > phba->sli4_hba.num_present_cpu)
		phba->cfg_irq_chann = phba->sli4_hba.num_present_cpu;
	if (phba->cfg_irq_chann > phba->cfg_hdw_queue)
		phba->cfg_irq_chann = phba->cfg_hdw_queue;

	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
	    phba->nvmet_support) {
@@ -6953,11 +6961,11 @@ lpfc_nvme_mod_param_dep(struct lpfc_hba *phba)
		}

		if (!phba->cfg_nvmet_mrq)
			phba->cfg_nvmet_mrq = phba->cfg_hdw_queue;
			phba->cfg_nvmet_mrq = phba->cfg_irq_chann;

		/* Adjust lpfc_nvmet_mrq to avoid running out of WQE slots */
		if (phba->cfg_nvmet_mrq > phba->cfg_hdw_queue) {
			phba->cfg_nvmet_mrq = phba->cfg_hdw_queue;
		if (phba->cfg_nvmet_mrq > phba->cfg_irq_chann) {
			phba->cfg_nvmet_mrq = phba->cfg_irq_chann;
			lpfc_printf_log(phba, KERN_ERR, LOG_NVME_DISC,
					"6018 Adjust lpfc_nvmet_mrq to %d\n",
					phba->cfg_nvmet_mrq);
+0 −1
Original line number Diff line number Diff line
@@ -440,7 +440,6 @@ extern spinlock_t _dump_buf_lock;
extern int _dump_buf_done;
extern spinlock_t pgcnt_lock;
extern unsigned int pgcnt;
extern unsigned int lpfc_fcp_look_ahead;

/* Interface exported by fabric iocb scheduler */
void lpfc_fabric_abort_nport(struct lpfc_nodelist *);
+216 −87
Original line number Diff line number Diff line
@@ -378,6 +378,67 @@ skipit:
	return len;
}

static int lpfc_debugfs_last_xripool;

/**
 * lpfc_debugfs_common_xri_data - Dump Hardware Queue info to a buffer
 * @phba: The HBA to gather host buffer info from.
 * @buf: The buffer to dump log into.
 * @size: The maximum amount of data to process.
 *
 * Description:
 * This routine dumps the Hardware Queue info from the @phba to @buf up to
 * @size number of bytes. A header that describes the current hdwq state will be
 * dumped to @buf first and then info on each hdwq entry will be dumped to @buf
 * until @size bytes have been dumped or all the hdwq info has been dumped.
 *
 * Notes:
 * This routine will rotate through each configured Hardware Queue each
 * time called.
 *
 * Return Value:
 * This routine returns the amount of bytes that were dumped into @buf and will
 * not exceed @size.
 **/
static int
lpfc_debugfs_commonxripools_data(struct lpfc_hba *phba, char *buf, int size)
{
	struct lpfc_sli4_hdw_queue *qp;
	int len = 0;
	int i, out;
	unsigned long iflag;

	for (i = 0; i < phba->cfg_hdw_queue; i++) {
		if (len > (LPFC_DUMP_MULTIXRIPOOL_SIZE - 80))
			break;
		qp = &phba->sli4_hba.hdwq[lpfc_debugfs_last_xripool];

		len +=  snprintf(buf + len, size - len, "HdwQ %d Info ", i);
		spin_lock_irqsave(&qp->abts_scsi_buf_list_lock, iflag);
		spin_lock(&qp->abts_nvme_buf_list_lock);
		spin_lock(&qp->io_buf_list_get_lock);
		spin_lock(&qp->io_buf_list_put_lock);
		out = qp->total_io_bufs - (qp->get_io_bufs + qp->put_io_bufs +
			qp->abts_scsi_io_bufs + qp->abts_nvme_io_bufs);
		len +=  snprintf(buf + len, size - len,
				 "tot:%d get:%d put:%d mt:%d "
				 "ABTS scsi:%d nvme:%d Out:%d\n",
			qp->total_io_bufs, qp->get_io_bufs, qp->put_io_bufs,
			qp->empty_io_bufs, qp->abts_scsi_io_bufs,
			qp->abts_nvme_io_bufs, out);
		spin_unlock(&qp->io_buf_list_put_lock);
		spin_unlock(&qp->io_buf_list_get_lock);
		spin_unlock(&qp->abts_nvme_buf_list_lock);
		spin_unlock_irqrestore(&qp->abts_scsi_buf_list_lock, iflag);

		lpfc_debugfs_last_xripool++;
		if (lpfc_debugfs_last_xripool >= phba->cfg_hdw_queue)
			lpfc_debugfs_last_xripool = 0;
	}

	return len;
}

/**
 * lpfc_debugfs_multixripools_data - Display multi-XRI pools information
 * @phba: The HBA to gather host buffer info from.
@@ -405,6 +466,17 @@ lpfc_debugfs_multixripools_data(struct lpfc_hba *phba, char *buf, int size)
	u32 txcmplq_cnt;
	char tmp[LPFC_DEBUG_OUT_LINE_SZ] = {0};

	if (phba->sli_rev != LPFC_SLI_REV4)
		return 0;

	if (!phba->sli4_hba.hdwq)
		return 0;

	if (!phba->cfg_xri_rebalancing) {
		i = lpfc_debugfs_commonxripools_data(phba, buf, size);
		return i;
	}

	/*
	 * Pbl: Current number of free XRIs in public pool
	 * Pvt: Current number of free XRIs in private pool
@@ -498,10 +570,12 @@ lpfc_debugfs_multixripools_data(struct lpfc_hba *phba, char *buf, int size)
	return strnlen(buf, size);
}

static int lpfc_debugfs_last_hdwq;

#ifdef LPFC_HDWQ_LOCK_STAT
static int lpfc_debugfs_last_lock;

/**
 * lpfc_debugfs_hdwqinfo_data - Dump Hardware Queue info to a buffer
 * lpfc_debugfs_lockstat_data - Dump Hardware Queue info to a buffer
 * @phba: The HBA to gather host buffer info from.
 * @buf: The buffer to dump log into.
 * @size: The maximum amount of data to process.
@@ -521,12 +595,11 @@ static int lpfc_debugfs_last_hdwq;
 * not exceed @size.
 **/
static int
lpfc_debugfs_hdwqinfo_data(struct lpfc_hba *phba, char *buf, int size)
lpfc_debugfs_lockstat_data(struct lpfc_hba *phba, char *buf, int size)
{
	struct lpfc_sli4_hdw_queue *qp;
	int len = 0;
	int i, out;
	unsigned long iflag;
	int i;

	if (phba->sli_rev != LPFC_SLI_REV4)
		return 0;
@@ -535,35 +608,40 @@ lpfc_debugfs_hdwqinfo_data(struct lpfc_hba *phba, char *buf, int size)
		return 0;

	for (i = 0; i < phba->cfg_hdw_queue; i++) {
		if (len > (LPFC_HDWQINFO_SIZE - 80))
		if (len > (LPFC_HDWQINFO_SIZE - 100))
			break;
		qp = &phba->sli4_hba.hdwq[lpfc_debugfs_last_hdwq];
		qp = &phba->sli4_hba.hdwq[lpfc_debugfs_last_lock];

		len +=  snprintf(buf + len, size - len, "HdwQ %d Info ", i);
		spin_lock_irqsave(&qp->abts_scsi_buf_list_lock, iflag);
		spin_lock(&qp->abts_nvme_buf_list_lock);
		spin_lock(&qp->io_buf_list_get_lock);
		spin_lock(&qp->io_buf_list_put_lock);
		out = qp->total_io_bufs - (qp->get_io_bufs + qp->put_io_bufs +
			qp->abts_scsi_io_bufs + qp->abts_nvme_io_bufs);
		len +=  snprintf(buf + len, size - len, "HdwQ %03d Lock ", i);
		if (phba->cfg_xri_rebalancing) {
			len +=  snprintf(buf + len, size - len,
				 "tot:%d get:%d put:%d mt:%d "
				 "ABTS scsi:%d nvme:%d Out:%d\n",
			qp->total_io_bufs, qp->get_io_bufs, qp->put_io_bufs,
			qp->empty_io_bufs, qp->abts_scsi_io_bufs,
			qp->abts_nvme_io_bufs, out);
		spin_unlock(&qp->io_buf_list_put_lock);
		spin_unlock(&qp->io_buf_list_get_lock);
		spin_unlock(&qp->abts_nvme_buf_list_lock);
		spin_unlock_irqrestore(&qp->abts_scsi_buf_list_lock, iflag);
					 "get_pvt:%d mv_pvt:%d "
					 "mv2pub:%d mv2pvt:%d "
					 "put_pvt:%d put_pub:%d wq:%d\n",
					 qp->lock_conflict.alloc_pvt_pool,
					 qp->lock_conflict.mv_from_pvt_pool,
					 qp->lock_conflict.mv_to_pub_pool,
					 qp->lock_conflict.mv_to_pvt_pool,
					 qp->lock_conflict.free_pvt_pool,
					 qp->lock_conflict.free_pub_pool,
					 qp->lock_conflict.wq_access);
		} else {
			len +=  snprintf(buf + len, size - len,
					 "get:%d put:%d free:%d wq:%d\n",
					 qp->lock_conflict.alloc_xri_get,
					 qp->lock_conflict.alloc_xri_put,
					 qp->lock_conflict.free_xri,
					 qp->lock_conflict.wq_access);
		}

		lpfc_debugfs_last_hdwq++;
		if (lpfc_debugfs_last_hdwq >= phba->cfg_hdw_queue)
			lpfc_debugfs_last_hdwq = 0;
		lpfc_debugfs_last_lock++;
		if (lpfc_debugfs_last_lock >= phba->cfg_hdw_queue)
			lpfc_debugfs_last_lock = 0;
	}

	return len;
}
#endif

static int lpfc_debugfs_last_hba_slim_off;

@@ -964,7 +1042,7 @@ lpfc_debugfs_nvmestat_data(struct lpfc_vport *vport, char *buf, int size)
	struct lpfc_nvme_lport *lport;
	uint64_t data1, data2, data3;
	uint64_t tot, totin, totout;
	int cnt, i, maxch;
	int cnt, i;
	int len = 0;

	if (phba->nvmet_support) {
@@ -1106,10 +1184,6 @@ lpfc_debugfs_nvmestat_data(struct lpfc_vport *vport, char *buf, int size)
				atomic_read(&lport->fc4NvmeLsRequests),
				atomic_read(&lport->fc4NvmeLsCmpls));

		if (phba->cfg_hdw_queue < LPFC_HBA_HDWQ_MAX)
			maxch = phba->cfg_hdw_queue;
		else
			maxch = LPFC_HBA_HDWQ_MAX;
		totin = 0;
		totout = 0;
		for (i = 0; i < phba->cfg_hdw_queue; i++) {
@@ -1547,7 +1621,7 @@ lpfc_debugfs_cpucheck_data(struct lpfc_vport *vport, char *buf, int size)
{
	struct lpfc_hba   *phba = vport->phba;
	struct lpfc_sli4_hdw_queue *qp;
	int i, j;
	int i, j, max_cnt;
	int len = 0;
	uint32_t tot_xmt;
	uint32_t tot_rcv;
@@ -1565,6 +1639,7 @@ lpfc_debugfs_cpucheck_data(struct lpfc_vport *vport, char *buf, int size)
	} else {
		len += snprintf(buf + len, PAGE_SIZE - len, "\n");
	}
	max_cnt = size - LPFC_DEBUG_OUT_LINE_SZ;

	for (i = 0; i < phba->cfg_hdw_queue; i++) {
		qp = &phba->sli4_hba.hdwq[i];
@@ -1606,6 +1681,11 @@ lpfc_debugfs_cpucheck_data(struct lpfc_vport *vport, char *buf, int size)
		}
		len += snprintf(buf + len, PAGE_SIZE - len,
				"Total: %x\n", tot_xmt);
		if (len >= max_cnt) {
			len += snprintf(buf + len, PAGE_SIZE - len,
					"Truncated ...\n");
			return len;
		}
	}
	return len;
}
@@ -1904,11 +1984,8 @@ lpfc_debugfs_multixripools_open(struct inode *inode, struct file *file)
		goto out;
	}

	if (phba->cfg_xri_rebalancing)
	debug->len = lpfc_debugfs_multixripools_data(
		phba, debug->buffer, LPFC_DUMP_MULTIXRIPOOL_SIZE);
	else
		debug->len = 0;

	debug->i_private = inode->i_private;
	file->private_data = debug;
@@ -1918,8 +1995,9 @@ out:
	return rc;
}

#ifdef LPFC_HDWQ_LOCK_STAT
/**
 * lpfc_debugfs_hdwqinfo_open - Open the hdwqinfo debugfs buffer
 * lpfc_debugfs_lockstat_open - Open the lockstat debugfs buffer
 * @inode: The inode pointer that contains a vport pointer.
 * @file: The file pointer to attach the log output.
 *
@@ -1934,7 +2012,7 @@ out:
 * error value.
 **/
static int
lpfc_debugfs_hdwqinfo_open(struct inode *inode, struct file *file)
lpfc_debugfs_lockstat_open(struct inode *inode, struct file *file)
{
	struct lpfc_hba *phba = inode->i_private;
	struct lpfc_debug *debug;
@@ -1951,7 +2029,7 @@ lpfc_debugfs_hdwqinfo_open(struct inode *inode, struct file *file)
		goto out;
	}

	debug->len = lpfc_debugfs_hdwqinfo_data(phba, debug->buffer,
	debug->len = lpfc_debugfs_lockstat_data(phba, debug->buffer,
		LPFC_HBQINFO_SIZE);
	file->private_data = debug;

@@ -1960,6 +2038,48 @@ out:
	return rc;
}

static ssize_t
lpfc_debugfs_lockstat_write(struct file *file, const char __user *buf,
			    size_t nbytes, loff_t *ppos)
{
	struct lpfc_debug *debug = file->private_data;
	struct lpfc_hba *phba = (struct lpfc_hba *)debug->i_private;
	struct lpfc_sli4_hdw_queue *qp;
	char mybuf[64];
	char *pbuf;
	int i;

	/* Protect copy from user */
	if (!access_ok(buf, nbytes))
		return -EFAULT;

	memset(mybuf, 0, sizeof(mybuf));

	if (copy_from_user(mybuf, buf, nbytes))
		return -EFAULT;
	pbuf = &mybuf[0];

	if ((strncmp(pbuf, "reset", strlen("reset")) == 0) ||
	    (strncmp(pbuf, "zero", strlen("zero")) == 0)) {
		for (i = 0; i < phba->cfg_hdw_queue; i++) {
			qp = &phba->sli4_hba.hdwq[i];
			qp->lock_conflict.alloc_xri_get = 0;
			qp->lock_conflict.alloc_xri_put = 0;
			qp->lock_conflict.free_xri = 0;
			qp->lock_conflict.wq_access = 0;
			qp->lock_conflict.alloc_pvt_pool = 0;
			qp->lock_conflict.mv_from_pvt_pool = 0;
			qp->lock_conflict.mv_to_pub_pool = 0;
			qp->lock_conflict.mv_to_pvt_pool = 0;
			qp->lock_conflict.free_pvt_pool = 0;
			qp->lock_conflict.free_pub_pool = 0;
			qp->lock_conflict.wq_access = 0;
		}
	}
	return nbytes;
}
#endif

/**
 * lpfc_debugfs_dumpHBASlim_open - Open the Dump HBA SLIM debugfs buffer
 * @inode: The inode pointer that contains a vport pointer.
@@ -2816,7 +2936,7 @@ lpfc_debugfs_cpucheck_open(struct inode *inode, struct file *file)
	}

	debug->len = lpfc_debugfs_cpucheck_data(vport, debug->buffer,
		LPFC_NVMEKTIME_SIZE);
		LPFC_CPUCHECK_SIZE);

	debug->i_private = inode->i_private;
	file->private_data = debug;
@@ -2848,11 +2968,21 @@ lpfc_debugfs_cpucheck_write(struct file *file, const char __user *buf,
	pbuf = &mybuf[0];

	if ((strncmp(pbuf, "on", sizeof("on") - 1) == 0)) {
		if (phba->nvmet_support)
			phba->cpucheck_on |= LPFC_CHECK_NVMET_IO;
		else
			phba->cpucheck_on |= (LPFC_CHECK_NVME_IO |
				LPFC_CHECK_SCSI_IO);
		return strlen(pbuf);
	} else if ((strncmp(pbuf, "nvme_on", sizeof("nvme_on") - 1) == 0)) {
		if (phba->nvmet_support)
			phba->cpucheck_on |= LPFC_CHECK_NVMET_IO;
		else
			phba->cpucheck_on |= LPFC_CHECK_NVME_IO;
		return strlen(pbuf);
	} else if ((strncmp(pbuf, "scsi_on", sizeof("scsi_on") - 1) == 0)) {
		phba->cpucheck_on |= LPFC_CHECK_SCSI_IO;
		return strlen(pbuf);
	} else if ((strncmp(pbuf, "rcv",
		   sizeof("rcv") - 1) == 0)) {
		if (phba->nvmet_support)
@@ -3732,12 +3862,9 @@ lpfc_idiag_cqs_for_eq(struct lpfc_hba *phba, char *pbuffer,
		int *len, int max_cnt, int eqidx, int eq_id)
{
	struct lpfc_queue *qp;
	int qidx, rc;
	int rc;

	for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
		qp = phba->sli4_hba.hdwq[qidx].fcp_cq;
		if (qp->assoc_qid != eq_id)
			continue;
	qp = phba->sli4_hba.hdwq[eqidx].fcp_cq;

	*len = __lpfc_idiag_print_cq(qp, "FCP", pbuffer, *len);

@@ -3751,13 +3878,9 @@ lpfc_idiag_cqs_for_eq(struct lpfc_hba *phba, char *pbuffer,
				   max_cnt, qp->queue_id);
	if (rc)
		return 1;
	}

	if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
		for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
			qp = phba->sli4_hba.hdwq[qidx].nvme_cq;
			if (qp->assoc_qid != eq_id)
				continue;
		qp = phba->sli4_hba.hdwq[eqidx].nvme_cq;

		*len = __lpfc_idiag_print_cq(qp, "NVME", pbuffer, *len);

@@ -3772,7 +3895,6 @@ lpfc_idiag_cqs_for_eq(struct lpfc_hba *phba, char *pbuffer,
		if (rc)
			return 1;
	}
	}

	if ((eqidx < phba->cfg_nvmet_mrq) && phba->nvmet_support) {
		/* NVMET CQset */
@@ -3812,9 +3934,10 @@ __lpfc_idiag_print_eq(struct lpfc_queue *qp, char *eqtype,
			(unsigned long long)qp->q_cnt_4, qp->q_mode);
	len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len,
			"EQID[%02d], QE-CNT[%04d], QE-SZ[%04d], "
			"HST-IDX[%04d], PRT-IDX[%04d], PST[%03d]",
			"HST-IDX[%04d], PRT-IDX[%04d], PST[%03d] AFFIN[%03d]",
			qp->queue_id, qp->entry_count, qp->entry_size,
			qp->host_index, qp->hba_index, qp->entry_repost);
			qp->host_index, qp->hba_index, qp->entry_repost,
			qp->chann);
	len +=  snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len, "\n");

	return len;
@@ -3869,7 +3992,7 @@ lpfc_idiag_queinfo_read(struct file *file, char __user *buf, size_t nbytes,
			phba->lpfc_idiag_last_eq = 0;

		len += snprintf(pbuffer + len, LPFC_QUE_INFO_GET_BUF_SIZE - len,
					"EQ %d out of %d HBA EQs\n",
					"HDWQ %d out of %d HBA HDWQs\n",
					x, phba->cfg_hdw_queue);

		/* Fast-path EQ */
@@ -5299,14 +5422,17 @@ static const struct file_operations lpfc_debugfs_op_hbqinfo = {
	.release =      lpfc_debugfs_release,
};

#undef lpfc_debugfs_op_hdwqinfo
static const struct file_operations lpfc_debugfs_op_hdwqinfo = {
#ifdef LPFC_HDWQ_LOCK_STAT
#undef lpfc_debugfs_op_lockstat
static const struct file_operations lpfc_debugfs_op_lockstat = {
	.owner =        THIS_MODULE,
	.open =         lpfc_debugfs_hdwqinfo_open,
	.open =         lpfc_debugfs_lockstat_open,
	.llseek =       lpfc_debugfs_lseek,
	.read =         lpfc_debugfs_read,
	.write =        lpfc_debugfs_lockstat_write,
	.release =      lpfc_debugfs_release,
};
#endif

#undef lpfc_debugfs_op_dumpHBASlim
static const struct file_operations lpfc_debugfs_op_dumpHBASlim = {
@@ -5756,17 +5882,19 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport)
					    phba->hba_debugfs_root,
					    phba, &lpfc_debugfs_op_hbqinfo);

		/* Setup hdwqinfo */
		snprintf(name, sizeof(name), "hdwqinfo");
		phba->debug_hdwqinfo =
#ifdef LPFC_HDWQ_LOCK_STAT
		/* Setup lockstat */
		snprintf(name, sizeof(name), "lockstat");
		phba->debug_lockstat =
			debugfs_create_file(name, S_IFREG | 0644,
					    phba->hba_debugfs_root,
					    phba, &lpfc_debugfs_op_hdwqinfo);
		if (!phba->debug_hdwqinfo) {
					    phba, &lpfc_debugfs_op_lockstat);
		if (!phba->debug_lockstat) {
			lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
					 "0511 Cant create debugfs hdwqinfo\n");
					 "0913 Cant create debugfs lockstat\n");
			goto debug_failed;
		}
#endif

		/* Setup dumpHBASlim */
		if (phba->sli_rev < LPFC_SLI_REV4) {
@@ -6006,7 +6134,7 @@ nvmeio_off:
				    vport, &lpfc_debugfs_op_scsistat);
	if (!vport->debug_scsistat) {
		lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
				 "0811 Cannot create debugfs scsistat\n");
				 "0914 Cannot create debugfs scsistat\n");
		goto debug_failed;
	}

@@ -6171,9 +6299,10 @@ lpfc_debugfs_terminate(struct lpfc_vport *vport)
		debugfs_remove(phba->debug_hbqinfo); /* hbqinfo */
		phba->debug_hbqinfo = NULL;

		debugfs_remove(phba->debug_hdwqinfo); /* hdwqinfo */
		phba->debug_hdwqinfo = NULL;

#ifdef LPFC_HDWQ_LOCK_STAT
		debugfs_remove(phba->debug_lockstat); /* lockstat */
		phba->debug_lockstat = NULL;
#endif
		debugfs_remove(phba->debug_dumpHBASlim); /* HBASlim */
		phba->debug_dumpHBASlim = NULL;

+0 −3
Original line number Diff line number Diff line
@@ -290,9 +290,6 @@ struct lpfc_idiag {
/* multixripool output buffer size */
#define LPFC_DUMP_MULTIXRIPOOL_SIZE 8192

/* hdwqinfo output buffer size */
#define LPFC_HDWQINFO_SIZE 8192

enum {
	DUMP_FCP,
	DUMP_NVME,
Loading