perf, x86: Disable PEBS on SandyBridge chips (6a600a8b) · Commits · 戴 / test

arch/x86/kernel/cpu/perf_event_intel.c

+8 −0

Original line number	Diff line number	Diff line
		@@ -1545,6 +1545,13 @@ static void intel_clovertown_quirks(void)
		x86_pmu.pebs_constraints = NULL;
		}

		static void intel_sandybridge_quirks(void)
		{
		printk(KERN_WARNING "PEBS disabled due to CPU errata.\n");
		x86_pmu.pebs = 0;
		x86_pmu.pebs_constraints = NULL;
		}

		__init int intel_pmu_init(void)
		{
		union cpuid10_edx edx;
		@@ -1694,6 +1701,7 @@ __init int intel_pmu_init(void)
		break;

		case 42: /* SandyBridge */
		x86_pmu.quirks = intel_sandybridge_quirks;
		case 45: /* SandyBridge, "Romely-EP" */
		memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
		sizeof(hw_cache_event_ids));