Commit 6a57d104 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM Soc updates, take 2, from Olof Johansson:
 "This is the second batch of SoC updates for the 3.8 merge window,
  containing parts that had dependencies on earlier branches such that
  we couldn't include them with the first branch.

  These are general updates for Samsung Exynos, Renesas/shmobile and a
  topic branch that adds SMP support to Altera's socfpga platform."

Fix up conflicts mostly as per Olof.

* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: EXYNOS: Clock settings for SATA and SATA PHY
  ARM: EXYNOS: Add ARM down clock support
  ARM: EXYNOS: Fix i2c suspend/resume for legacy controller
  ARM: EXYNOS: Add aliases for i2c controller
  ARM: EXYNOS: Setup legacy i2c controller interrupts
  sh: clkfwk: fixup unsed variable warning
  Revert "ARM: shmobile: r8a7779: Replace modify_scu_cpu_psr with scu_power_mode"
  Revert "ARM: shmobile: sh73a0: Replace modify_scu_cpu_psr with scu_power_mode"
  Revert "ARM: shmobile: emev2: Replace modify_scu_cpu_psr with scu_power_mode"
  ARM: highbank: use common debug_ll_io_init
  ARM: shmobile: sh7372: sh7372_fsiXck_clk become non-global
  ARM: shmobile: sh7372: remove fsidivx clock
  ARM: socfpga: mark secondary_trampoline as cpuinit
  socfpga: map uart into virtual address space so that early_printk() works
  ARM: socfpga: fix build break for allyesconfig
  ARM: socfpga: Enable SMP for socfpga
  ARM: EXYNOS: Add dp clock support for EXYNOS5
  ARM: SAMSUNG: call clk_get_rate for debugfs rate files
  ARM: SAMSUNG: add clock_tree debugfs file in clock
parents cebfa85e c91321e8

Documentation/devicetree/bindings/arm/altera/socfpga-reset.txt

0 → 100644
+11 −0
Original line number Diff line number Diff line 
Altera SOCFPGA Reset Manager



Required properties:

- compatible : "altr,rst-mgr"

- reg : Should contain 1 register ranges(address and length)



Example:

	 rstmgr@ffd05000 {

		compatible = "altr,rst-mgr";

		reg = <0xffd05000 0x1000>;

	};

Documentation/devicetree/bindings/arm/altera/socfpga-system.txt

0 → 100644
+11 −0
Original line number Diff line number Diff line 
Altera SOCFPGA System Manager



Required properties:

- compatible : "altr,sys-mgr"

- reg : Should contain 1 register ranges(address and length)



Example:

	 sysmgr@ffd08000 {

		compatible = "altr,sys-mgr";

		reg = <0xffd08000 0x1000>;

	};

arch/arm/boot/dts/exynos5250.dtsi

+18 −9
Original line number Diff line number Diff line
@@ -35,6 +35,15 @@ 
		mshc1 = &dwmmc_1;

		mshc2 = &dwmmc_2;

		mshc3 = &dwmmc_3;

		i2c0 = &i2c_0;

		i2c1 = &i2c_1;

		i2c2 = &i2c_2;

		i2c3 = &i2c_3;

		i2c4 = &i2c_4;

		i2c5 = &i2c_5;

		i2c6 = &i2c_6;

		i2c7 = &i2c_7;

		i2c8 = &i2c_8;

	};



	gic:interrupt-controller@10481000 {
@@ -119,7 +128,7 @@ 
		reg = <0x12170000 0x1ff>;

	};



	i2c@12C60000 {

	i2c_0: i2c@12C60000 {

		compatible = "samsung,s3c2440-i2c";

		reg = <0x12C60000 0x100>;

		interrupts = <0 56 0>;
@@ -127,7 +136,7 @@ 
		#size-cells = <0>;

	};



	i2c@12C70000 {

	i2c_1: i2c@12C70000 {

		compatible = "samsung,s3c2440-i2c";

		reg = <0x12C70000 0x100>;

		interrupts = <0 57 0>;
@@ -135,7 +144,7 @@ 
		#size-cells = <0>;

	};



	i2c@12C80000 {

	i2c_2: i2c@12C80000 {

		compatible = "samsung,s3c2440-i2c";

		reg = <0x12C80000 0x100>;

		interrupts = <0 58 0>;
@@ -143,7 +152,7 @@ 
		#size-cells = <0>;

	};



	i2c@12C90000 {

	i2c_3: i2c@12C90000 {

		compatible = "samsung,s3c2440-i2c";

		reg = <0x12C90000 0x100>;

		interrupts = <0 59 0>;
@@ -151,7 +160,7 @@ 
		#size-cells = <0>;

	};



	i2c@12CA0000 {

	i2c_4: i2c@12CA0000 {

		compatible = "samsung,s3c2440-i2c";

		reg = <0x12CA0000 0x100>;

		interrupts = <0 60 0>;
@@ -159,7 +168,7 @@ 
		#size-cells = <0>;

	};



	i2c@12CB0000 {

	i2c_5: i2c@12CB0000 {

		compatible = "samsung,s3c2440-i2c";

		reg = <0x12CB0000 0x100>;

		interrupts = <0 61 0>;
@@ -167,7 +176,7 @@ 
		#size-cells = <0>;

	};



	i2c@12CC0000 {

	i2c_6: i2c@12CC0000 {

		compatible = "samsung,s3c2440-i2c";

		reg = <0x12CC0000 0x100>;

		interrupts = <0 62 0>;
@@ -175,7 +184,7 @@ 
		#size-cells = <0>;

	};



	i2c@12CD0000 {

	i2c_7: i2c@12CD0000 {

		compatible = "samsung,s3c2440-i2c";

		reg = <0x12CD0000 0x100>;

		interrupts = <0 63 0>;
@@ -183,7 +192,7 @@ 
		#size-cells = <0>;

	};



	i2c@12CE0000 {

	i2c_8: i2c@12CE0000 {

		compatible = "samsung,s3c2440-hdmiphy-i2c";

		reg = <0x12CE0000 0x1000>;

		interrupts = <0 64 0>;

arch/arm/boot/dts/socfpga.dtsi

+10 −0
Original line number Diff line number Diff line
@@ -143,5 +143,15 @@ 
			reg-shift = <2>;

			reg-io-width = <4>;

		};



		rstmgr@ffd05000 {

				compatible = "altr,rst-mgr";

				reg = <0xffd05000 0x1000>;

			};



		sysmgr@ffd08000 {

				compatible = "altr,sys-mgr";

				reg = <0xffd08000 0x4000>;

			};

	};

};

arch/arm/configs/socfpga_defconfig

+2 −1
Original line number Diff line number Diff line
@@ -18,9 +18,10 @@ CONFIG_MODULE_UNLOAD=y 
CONFIG_ARCH_SOCFPGA=y

CONFIG_MACH_SOCFPGA_CYCLONE5=y

CONFIG_ARM_THUMBEE=y

# CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set

# CONFIG_CACHE_L2X0 is not set

CONFIG_HIGH_RES_TIMERS=y

CONFIG_VMSPLIT_2G=y

CONFIG_SMP=y

CONFIG_NR_CPUS=2

CONFIG_AEABI=y

CONFIG_ZBOOT_ROM_TEXT=0x0

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