Commit 6a45716a authored by Helge Deller's avatar Helge Deller
Browse files

parisc: fix partly 16/64k PAGE_SIZE boot 



This patch fixes partly PAGE_SIZEs of 16K or 64K by adjusting the
assembler PTE lookup code and the assembler TEMPALIAS code.  Furthermore
some data alignments for PAGE_SIZE have been limited to 4K (or less) to
not waste too much memory with greater page sizes. As a side note, the
palo loader can (currently) only handle up to 10 ELF segments which is
fixed with tighter aligning as well.

My testings indicated that the ldci command in the sba iommu coding
needed adjustment by the PAGE_SHIFT value and that the I/O PDIR Page
size was only set to 4K for my machine (C3000).

All this fixes partly the boot, but there are still quite some caching
problems left.  Examples are e.g. the symbios logic driver which is
failing:

sym0: <896> rev 0x7 at pci 0000:00:0f.0 irq 69
sym0: PA-RISC Firmware, ID 7, Fast-40, SE, parity checking
CACHE TEST FAILED: DMA error (dstat=0x81).sym0: CACHE INCORRECTLY CONFIGURED.

and the tulip network driver which doesn't seem to work correctly
either:

Sending BOOTP requests .net eth0: Setting full-duplex based on MII#1
link partner capability of 05e1
..... timed out!

Beside those kernel fixes glibc will need fixes too to be able to handle
>4K page sizes.

Signed-off-by: default avatarHelge Deller <deller@gmx.de>
parent 7f64fb41

arch/parisc/kernel/entry.S

+9 −1
Original line number Original line Diff line number Diff line
@@ -399,8 +399,16 @@ 
	.macro		L2_ptep	pmd,pte,index,va,fault

	.macro		L2_ptep	pmd,pte,index,va,fault

#if PT_NLEVELS == 3

#if PT_NLEVELS == 3

	extru		\va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index

	extru		\va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index

#else

# if defined(CONFIG_64BIT)

	extrd,u		\va,63-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index

  #else

  # if PAGE_SIZE > 4096

	extru		\va,31-ASM_PGDIR_SHIFT,32-ASM_PGDIR_SHIFT,\index

  # else

  # else

	extru		\va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index

	extru		\va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index

  # endif

# endif

#endif

#endif

	dep             %r0,31,PAGE_SHIFT,\pmd  /* clear offset */

	dep             %r0,31,PAGE_SHIFT,\pmd  /* clear offset */

	copy		%r0,\pte

	copy		%r0,\pte
@@ -615,7 +623,7 @@ 




	.text

	.text





	.align	PAGE_SIZE

	.align 4096





ENTRY(fault_vector_20)

ENTRY(fault_vector_20)

	/* First vector is invalid (0) */

	/* First vector is invalid (0) */

arch/parisc/kernel/hpmc.S

+2 −2
Original line number Original line Diff line number Diff line
@@ -55,13 +55,13 @@ 
	 * IODC requires 7K byte stack.  That leaves 1K byte for os_hpmc.

	 * IODC requires 7K byte stack.  That leaves 1K byte for os_hpmc.

	 */

	 */





	.align	PAGE_SIZE

	.align 4096

hpmc_stack:

hpmc_stack:

	.block 16384

	.block 16384





#define HPMC_IODC_BUF_SIZE 0x8000

#define HPMC_IODC_BUF_SIZE 0x8000





	.align	PAGE_SIZE

	.align 4096

hpmc_iodc_buf:

hpmc_iodc_buf:

	.block HPMC_IODC_BUF_SIZE

	.block HPMC_IODC_BUF_SIZE

arch/parisc/kernel/pacache.S

+19 −14
Original line number Original line Diff line number Diff line
@@ -563,6 +563,15 @@ ENDPROC(copy_page_asm) 
 *          %r23 physical page (shifted for tlb insert) of "from" translation

 *          %r23 physical page (shifted for tlb insert) of "from" translation

 */

 */





        /* Drop prot bits and convert to page addr for iitlbt and idtlbt */

        #define PAGE_ADD_SHIFT  (PAGE_SHIFT-12)

        .macro          convert_phys_for_tlb_insert20  phys

        extrd,u         \phys, 56-PAGE_ADD_SHIFT, 32-PAGE_ADD_SHIFT, \phys

#if _PAGE_SIZE_ENCODING_DEFAULT

        depdi           _PAGE_SIZE_ENCODING_DEFAULT, 63, (63-58), \phys

#endif

	.endm



	/*

	/*

	 * We can't do this since copy_user_page is used to bring in

	 * We can't do this since copy_user_page is used to bring in

	 * file data that might have instructions. Since the data would

	 * file data that might have instructions. Since the data would
@@ -589,15 +598,14 @@ ENTRY(copy_user_page_asm) 
	sub		%r25, %r1, %r23

	sub		%r25, %r1, %r23





	ldil		L%(TMPALIAS_MAP_START), %r28

	ldil		L%(TMPALIAS_MAP_START), %r28

	/* FIXME for different page sizes != 4k */

#ifdef CONFIG_64BIT

#ifdef CONFIG_64BIT

#if (TMPALIAS_MAP_START >= 0x80000000)

#if (TMPALIAS_MAP_START >= 0x80000000)

	depdi		0, 31,32, %r28		/* clear any sign extension */

	depdi		0, 31,32, %r28		/* clear any sign extension */

#endif

#endif

	extrd,u		%r26,56,32, %r26	/* convert phys addr to tlb insert format */

	convert_phys_for_tlb_insert20 %r26	/* convert phys addr to tlb insert format */

	extrd,u		%r23,56,32, %r23	/* convert phys addr to tlb insert format */

	convert_phys_for_tlb_insert20 %r23	/* convert phys addr to tlb insert format */

	depd		%r24,63,22, %r28	/* Form aliased virtual address 'to' */

	depd		%r24,63,22, %r28	/* Form aliased virtual address 'to' */

	depdi		0, 63,12, %r28		/* Clear any offset bits */

	depdi		0, 63,PAGE_SHIFT, %r28  /* Clear any offset bits */

	copy		%r28, %r29

	copy		%r28, %r29

	depdi		1, 41,1, %r29		/* Form aliased virtual address 'from' */

	depdi		1, 41,1, %r29		/* Form aliased virtual address 'from' */

#else

#else
@@ -747,11 +755,10 @@ ENTRY(clear_user_page_asm) 
#ifdef CONFIG_64BIT

#ifdef CONFIG_64BIT

#if (TMPALIAS_MAP_START >= 0x80000000)

#if (TMPALIAS_MAP_START >= 0x80000000)

	depdi		0, 31,32, %r28		/* clear any sign extension */

	depdi		0, 31,32, %r28		/* clear any sign extension */

	/* FIXME: page size dependend */

#endif

#endif

	extrd,u		%r26, 56,32, %r26	/* convert phys addr to tlb insert format */

	convert_phys_for_tlb_insert20 %r26	/* convert phys addr to tlb insert format */

	depd		%r25, 63,22, %r28	/* Form aliased virtual address 'to' */

	depd		%r25, 63,22, %r28	/* Form aliased virtual address 'to' */

	depdi		0, 63,12, %r28		/* Clear any offset bits */

	depdi		0, 63,PAGE_SHIFT, %r28	/* Clear any offset bits */

#else

#else

	extrw,u		%r26, 24,25, %r26	/* convert phys addr to tlb insert format */

	extrw,u		%r26, 24,25, %r26	/* convert phys addr to tlb insert format */

	depw		%r25, 31,22, %r28	/* Form aliased virtual address 'to' */

	depw		%r25, 31,22, %r28	/* Form aliased virtual address 'to' */
@@ -832,11 +839,10 @@ ENTRY(flush_dcache_page_asm) 
#ifdef CONFIG_64BIT

#ifdef CONFIG_64BIT

#if (TMPALIAS_MAP_START >= 0x80000000)

#if (TMPALIAS_MAP_START >= 0x80000000)

	depdi		0, 31,32, %r28		/* clear any sign extension */

	depdi		0, 31,32, %r28		/* clear any sign extension */

	/* FIXME: page size dependend */

#endif

#endif

	extrd,u		%r26, 56,32, %r26	/* convert phys addr to tlb insert format */

	convert_phys_for_tlb_insert20 %r26	/* convert phys addr to tlb insert format */

	depd		%r25, 63,22, %r28	/* Form aliased virtual address 'to' */

	depd		%r25, 63,22, %r28	/* Form aliased virtual address 'to' */

	depdi		0, 63,12, %r28		/* Clear any offset bits */

	depdi		0, 63,PAGE_SHIFT, %r28	/* Clear any offset bits */

#else

#else

	extrw,u		%r26, 24,25, %r26	/* convert phys addr to tlb insert format */

	extrw,u		%r26, 24,25, %r26	/* convert phys addr to tlb insert format */

	depw		%r25, 31,22, %r28	/* Form aliased virtual address 'to' */

	depw		%r25, 31,22, %r28	/* Form aliased virtual address 'to' */
@@ -909,11 +915,10 @@ ENTRY(flush_icache_page_asm) 
#ifdef CONFIG_64BIT

#ifdef CONFIG_64BIT

#if (TMPALIAS_MAP_START >= 0x80000000)

#if (TMPALIAS_MAP_START >= 0x80000000)

	depdi		0, 31,32, %r28		/* clear any sign extension */

	depdi		0, 31,32, %r28		/* clear any sign extension */

	/* FIXME: page size dependend */

#endif

#endif

	extrd,u		%r26, 56,32, %r26	/* convert phys addr to tlb insert format */

	convert_phys_for_tlb_insert20 %r26	/* convert phys addr to tlb insert format */

	depd		%r25, 63,22, %r28	/* Form aliased virtual address 'to' */

	depd		%r25, 63,22, %r28	/* Form aliased virtual address 'to' */

	depdi		0, 63,12, %r28		/* Clear any offset bits */

	depdi		0, 63,PAGE_SHIFT, %r28  /* Clear any offset bits */

#else

#else

	extrw,u		%r26, 24,25, %r26	/* convert phys addr to tlb insert format */

	extrw,u		%r26, 24,25, %r26	/* convert phys addr to tlb insert format */

	depw		%r25, 31,22, %r28	/* Form aliased virtual address 'to' */

	depw		%r25, 31,22, %r28	/* Form aliased virtual address 'to' */

arch/parisc/kernel/setup.c

+2 −0
Original line number Original line Diff line number Diff line
@@ -129,6 +129,8 @@ void __init setup_arch(char **cmdline_p) 
	printk(KERN_INFO "The 32-bit Kernel has started...\n");

	printk(KERN_INFO "The 32-bit Kernel has started...\n");

#endif

#endif





	printk(KERN_INFO "Default page size is %dKB.\n", (int)(PAGE_SIZE / 1024));



	pdc_console_init();

	pdc_console_init();





#ifdef CONFIG_64BIT

#ifdef CONFIG_64BIT

arch/parisc/kernel/syscall.S

+5 −4
Original line number Original line Diff line number Diff line
@@ -15,6 +15,7 @@ 
#include <asm/thread_info.h>

#include <asm/thread_info.h>

#include <asm/assembly.h>

#include <asm/assembly.h>

#include <asm/processor.h>

#include <asm/processor.h>

#include <asm/cache.h>





#include <linux/linkage.h>

#include <linux/linkage.h>
@@ -643,7 +644,7 @@ ENTRY(end_linux_gateway_page) 




	.section .rodata,"a"

	.section .rodata,"a"





	.align PAGE_SIZE

	.align 8

	/* Light-weight-syscall table */

	/* Light-weight-syscall table */

	/* Start of lws table. */

	/* Start of lws table. */

ENTRY(lws_table)

ENTRY(lws_table)
@@ -652,13 +653,13 @@ ENTRY(lws_table) 
END(lws_table)

END(lws_table)

	/* End of lws table */

	/* End of lws table */





	.align PAGE_SIZE

	.align 8

ENTRY(sys_call_table)

ENTRY(sys_call_table)

#include "syscall_table.S"

#include "syscall_table.S"

END(sys_call_table)

END(sys_call_table)





#ifdef CONFIG_64BIT

#ifdef CONFIG_64BIT

	.align PAGE_SIZE

	.align 8

ENTRY(sys_call_table64)

ENTRY(sys_call_table64)

#define SYSCALL_TABLE_64BIT

#define SYSCALL_TABLE_64BIT

#include "syscall_table.S"

#include "syscall_table.S"
@@ -674,7 +675,7 @@ END(sys_call_table64) 
		with ldcw.

		with ldcw.

	*/

	*/

	.section .data

	.section .data

	.align	PAGE_SIZE

	.align	L1_CACHE_BYTES

ENTRY(lws_lock_start)

ENTRY(lws_lock_start)

	/* lws locks */

	/* lws locks */

	.rept 16

	.rept 16

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