Commit 6a2f4b7d authored by Sebastian Andrzej Siewior's avatar Sebastian Andrzej Siewior Committed by Linus Walleij
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gpio: dwapb: use a second irq chip 



Right new have one irq chip running always in level mode. It would nicer
to have two irq chips where one is handling level type interrupts and
the other one is doing edge interrupts. So we can have at runtime two users
where one is using edge and the other level.

Acked-by: default avatarAlan Tull <delicious.quinoa@gmail.com>
Acked-by: default avatarJamie Iles <jamie@jamieiles.com>
Signed-off-by: default avatarSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent c829f956

drivers/gpio/gpio-dwapb.c

+22 −13
Original line number Diff line number Diff line
@@ -198,6 +198,8 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type) 
		break;

	}



	irq_setup_alt_chip(d, type);



	writel(level, gpio->regs + GPIO_INTTYPE_LEVEL);

	writel(polarity, gpio->regs + GPIO_INT_POLARITY);

	spin_unlock_irqrestore(&bgc->lock, flags);
@@ -213,7 +215,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, 
	struct irq_chip_generic	*irq_gc;

	unsigned int hwirq, ngpio = gc->ngpio;

	struct irq_chip_type *ct;

	int err, irq;

	int err, irq, i;



	irq = irq_of_parse_and_map(node, 0);

	if (!irq) {
@@ -227,7 +229,7 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, 
	if (!gpio->domain)

		return;



	err = irq_alloc_domain_generic_chips(gpio->domain, ngpio, 1,

	err = irq_alloc_domain_generic_chips(gpio->domain, ngpio, 2,

					     "gpio-dwapb", handle_level_irq,

					     IRQ_NOREQUEST, 0,

					     IRQ_GC_INIT_NESTED_LOCK);
@@ -248,7 +250,8 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, 
	irq_gc->reg_base = gpio->regs;

	irq_gc->private = gpio;



	ct = irq_gc->chip_types;

	for (i = 0; i < 2; i++) {

		ct = &irq_gc->chip_types[i];

		ct->chip.irq_ack = irq_gc_ack_set_bit;

		ct->chip.irq_mask = irq_gc_mask_set_bit;

		ct->chip.irq_unmask = irq_gc_mask_clr_bit;
@@ -259,6 +262,12 @@ static void dwapb_configure_irqs(struct dwapb_gpio *gpio, 
		ct->chip.irq_release_resources = dwapb_irq_relres;

		ct->regs.ack = GPIO_PORTA_EOI;

		ct->regs.mask = GPIO_INTMASK;

		ct->type = IRQ_TYPE_LEVEL_MASK;

	}



	irq_gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK;

	irq_gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH;

	irq_gc->chip_types[1].handler = handle_edge_irq;



	irq_set_chained_handler(irq, dwapb_irq_handler);

	irq_set_handler_data(irq, gpio);

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