Commit 6a1aa09b authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'renesas-soc-for-v4.14' of... 

Merge tag 'renesas-soc-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Pull "Renesas ARM Based SoC Updates for v4.14" Simon Horman:

* Add debug-ll support to RZ/G1M (r8a7743) SoC

  Chris Paterson says, "RZ/G1M uses SCIF0 for the debug console, like most
  of the R-Car Gen2 SoCs."

* Remove ARCH_SHMOBILE_MULTI

  Geert Uytterhoeven says, "The migration from ARCH_SHMOBILE_MULTI to
  ARCH_RENESAS has been completed in v4.12..."

* Correct arch timer frequency on RZ/G1M (r8a7743) SoC

  Geert Uytterhoeven says, "According to the datasheet, the frequency of
  the ARM architecture timer on RZ/G1E depends on the frequency of the ZS
  clock..."

* Add support for CPG/MSSR bindings

  Geert Uytterhoeven says, "When using the new CPG/MSSR bindings, there is
  no longer a "renesas,rcar-gen2-cpg-clocks" node, and the code to obtain
  the external clock crystal frequency falls back to a default of 20 MHz.
  While this is correct for all upstream R-Car Gen2 and RZ/G1 boards, this
  is not necessarily the case for out-of-tree third party boards.

  Add support for finding the external clock crystal oscillator on RZ/G1M,
  and on R-Car H2, M2-W, and M2-N using the new CPG/MSSR bindings, through
  the corresponding "renesas,r8a77xx-cpg-mssr" nodes."

* Obtain jump stub region from DT

  Geert Uytterhoeven says, "Add support for obtaining from DT the SRAM
  region to store the jump stub for CPU core bringup, according to the
  renesas,smp-sram DT bindings."

* tag 'renesas-soc-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Remove ARCH_SHMOBILE_MULTI
  ARM: shmobile: rcar-gen2: Correct arch timer frequency on RZ/G1E
  ARM: shmobile: rcar-gen2: Add support for CPG/MSSR bindings
  ARM: shmobile: rcar-gen2: Obtain jump stub region from DT
  ARM: debug-ll: Add support for r8a7743
parents 5cc3928c 84a1e84b

arch/arm/Kconfig.debug

+5 −4
Original line number Diff line number Diff line
@@ -896,12 +896,13 @@ choice 
		  via SCIF2 on Renesas R-Car H1 (R8A7779).



	config DEBUG_RCAR_GEN2_SCIF0

		bool "Kernel low-level debugging messages via SCIF0 on R8A7790/R8A7791/R8A7792/R8A7793"

		depends on ARCH_R8A7790 || ARCH_R8A7791 || ARCH_R8A7792 || ARCH_R8A7793

		bool "Kernel low-level debugging messages via SCIF0 on R-Car Gen2 and RZ/G1"

		depends on ARCH_R8A7743 || ARCH_R8A7790 || ARCH_R8A7791 || \

			ARCH_R8A7792 || ARCH_R8A7793

		help

		  Say Y here if you want kernel low-level debugging support

		  via SCIF0 on Renesas R-Car H2 (R8A7790), M2-W (R8A7791), V2H

		  (R8A7792), or M2-N (R8A7793).

		  via SCIF0 on Renesas RZ/G1M (R8A7743), R-Car H2 (R8A7790),

		  M2-W (R8A7791), V2H (R8A7792), or M2-N (R8A7793).



	config DEBUG_RCAR_GEN2_SCIF2

		bool "Kernel low-level debugging messages via SCIF2 on R8A7794"

arch/arm/mach-shmobile/Kconfig

+0 −4
Original line number Diff line number Diff line 
config ARCH_SHMOBILE

	bool



config ARCH_SHMOBILE_MULTI

	bool



config PM_RMOBILE

	bool

	select PM
@@ -34,7 +31,6 @@ menuconfig ARCH_RENESAS 
	depends on ARCH_MULTI_V7 && MMU

	select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE

	select ARCH_SHMOBILE

	select ARCH_SHMOBILE_MULTI

	select ARM_GIC

	select GPIOLIB

	select HAVE_ARM_SCU if SMP

arch/arm/mach-shmobile/pm-rcar-gen2.c

+30 −3
Original line number Diff line number Diff line
@@ -11,7 +11,9 @@ 
 */



#include <linux/kernel.h>

#include <linux/ioport.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <linux/smp.h>

#include <linux/soc/renesas/rcar-sysc.h>

#include <asm/io.h>
@@ -69,8 +71,9 @@ void __init rcar_gen2_pm_init(void) 
	struct device_node *np, *cpus;

	bool has_a7 = false;

	bool has_a15 = false;

	phys_addr_t boot_vector_addr = ICRAM1;

	struct resource res;

	u32 syscier = 0;

	int error;



	if (once++)

		return;
@@ -91,14 +94,38 @@ void __init rcar_gen2_pm_init(void) 
	else if (of_machine_is_compatible("renesas,r8a7791"))

		syscier = 0x00111003;



	np = of_find_compatible_node(NULL, NULL, "renesas,smp-sram");

	if (!np) {

		/* No smp-sram in DT, fall back to hardcoded address */

		res = (struct resource)DEFINE_RES_MEM(ICRAM1,

						      shmobile_boot_size);

		goto map;

	}



	error = of_address_to_resource(np, 0, &res);

	if (error) {

		pr_err("Failed to get smp-sram address: %d\n", error);

		return;

	}



map:

	/* RAM for jump stub, because BAR requires 256KB aligned address */

	p = ioremap_nocache(boot_vector_addr, shmobile_boot_size);

	if (res.start & (256 * 1024 - 1) ||

	    resource_size(&res) < shmobile_boot_size) {

		pr_err("Invalid smp-sram region\n");

		return;

	}



	p = ioremap(res.start, resource_size(&res));

	if (!p)

		return;



	memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);

	iounmap(p);



	/* setup reset vectors */

	p = ioremap_nocache(RST, 0x63);

	bar = phys_to_sbar(boot_vector_addr);

	bar = phys_to_sbar(res.start);

	if (has_a15) {

		writel_relaxed(bar, p + CA15BAR);

		writel_relaxed(bar | SBAR_BAREN, p + CA15BAR);

arch/arm/mach-shmobile/setup-rcar-gen2.c

+17 −4
Original line number Diff line number Diff line
@@ -29,17 +29,29 @@ 
#include "common.h"

#include "rcar-gen2.h"



static const struct of_device_id cpg_matches[] __initconst = {

	{ .compatible = "renesas,rcar-gen2-cpg-clocks", },

	{ .compatible = "renesas,r8a7743-cpg-mssr", .data = "extal" },

	{ .compatible = "renesas,r8a7790-cpg-mssr", .data = "extal" },

	{ .compatible = "renesas,r8a7791-cpg-mssr", .data = "extal" },

	{ .compatible = "renesas,r8a7793-cpg-mssr", .data = "extal" },

	{ /* sentinel */ }

};



static unsigned int __init get_extal_freq(void)

{

	const struct of_device_id *match;

	struct device_node *cpg, *extal;

	u32 freq = 20000000;

	int idx = 0;



	cpg = of_find_compatible_node(NULL, NULL,

				      "renesas,rcar-gen2-cpg-clocks");

	cpg = of_find_matching_node_and_match(NULL, cpg_matches, &match);

	if (!cpg)

		return freq;



	extal = of_parse_phandle(cpg, "clocks", 0);

	if (match->data)

		idx = of_property_match_string(cpg, "clock-names", match->data);

	extal = of_parse_phandle(cpg, "clocks", idx);

	of_node_put(cpg);

	if (!extal)

		return freq;
@@ -58,7 +70,8 @@ void __init rcar_gen2_timer_init(void) 
	void __iomem *base;

	u32 freq;



	if (of_machine_is_compatible("renesas,r8a7792") ||

	if (of_machine_is_compatible("renesas,r8a7745") ||

	    of_machine_is_compatible("renesas,r8a7792") ||

	    of_machine_is_compatible("renesas,r8a7794")) {

		freq = 260000000 / 8;	/* ZS / 8 */

		/* CNTVOFF has to be initialized either from non-secure

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