Commit 6a14c222 authored by Tudor Laurentiu's avatar Tudor Laurentiu Committed by Paul Mackerras
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powerpc/e6500: add TMCFG0 register definition



The register is not currently used in the base kernel
but will be in a forthcoming kvm patch.

Signed-off-by: default avatarLaurentiu Tudor <Laurentiu.Tudor@freescale.com>
Acked-by: default avatarScott Wood <scottwood@freescale.com>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 9ffecb10
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+6 −0
Original line number Diff line number Diff line
@@ -742,6 +742,12 @@
#define MMUBE1_VBE4		0x00000002
#define MMUBE1_VBE5		0x00000001

#define TMRN_TMCFG0      16	/* Thread Management Configuration Register 0 */
#define TMRN_TMCFG0_NPRIBITS       0x003f0000 /* Bits of thread priority */
#define TMRN_TMCFG0_NPRIBITS_SHIFT 16
#define TMRN_TMCFG0_NATHRD         0x00003f00 /* Number of active threads */
#define TMRN_TMCFG0_NATHRD_SHIFT   8
#define TMRN_TMCFG0_NTHRD          0x0000003f /* Number of threads */
#define TMRN_IMSR0	0x120	/* Initial MSR Register 0 (e6500) */
#define TMRN_IMSR1	0x121	/* Initial MSR Register 1 (e6500) */
#define TMRN_INIA0	0x140	/* Next Instruction Address Register 0 */