Commit 69f8fa9b authored by Kevin Hilman's avatar Kevin Hilman
Browse files

Merge tag 'sunxi-dt-for-3.14-2' of https://github.com/mripard/linux into next/dt 

From Maxime Ripard:
Second round of DT additions for 3.14

Mostly:
  - Addition of the missing PLLs and module clocks
  - Addition of the external clocks
  - Addition of the touchscreen controler
  - I2C nodes of the Cubietruck

* tag 'sunxi-dt-for-3.14-2' of https://github.com/mripard/linux

:
  arm: sun7i: cubietruck: Enable the i2c controllers
  ARM: dts: sun7i: external clock outputs
  ARM: dts: sun7i: Change 32768 Hz oscillator node name to clk@N style
  ARM: dts: sun7i: Add pin muxing options for clock outputs
  ARM: dts: sun7i: Add rtp controller node
  ARM: dts: sun5i: Add rtp controller node
  ARM: dts: sun4i: Add rtp controller node
  ARM: sun4i: dt: Remove chosen nodes
  ARM: sun4i: dt: Move the aliases to the DTSI
  ARM: sunxi: dt: add nodes for the mbus clock
  ARM: sun7i: dt: mod0 clocks
  ARM: sun5i: dt: mod0 clocks
  ARM: sun4i: dt: mod0 clocks
  ARM: sunxi: add PLL5 and PLL6 support
  ARM: sunxi: add PLL4 support

Signed-off-by: default avatarKevin Hilman <khilman@linaro.org>
parents 9ebde306 6267355f

arch/arm/boot/dts/sun4i-a10-a1000.dts

+0 −4
Original line number Diff line number Diff line
@@ -18,10 +18,6 @@ 
	model = "Mele A1000";

	compatible = "mele,a1000", "allwinner,sun4i-a10";



	aliases {

		serial0 = &uart0;

	};



	soc@01c00000 {

		emac: ethernet@01c0b000 {

			pinctrl-names = "default";

arch/arm/boot/dts/sun4i-a10-cubieboard.dts

+0 −9
Original line number Diff line number Diff line
@@ -17,15 +17,6 @@ 
	model = "Cubietech Cubieboard";

	compatible = "cubietech,a10-cubieboard", "allwinner,sun4i-a10";



	aliases {

		serial0 = &uart0;

		serial1 = &uart1;

	};



	chosen {

		bootargs = "earlyprintk console=ttyS0,115200";

	};



	soc@01c00000 {

		emac: ethernet@01c0b000 {

			pinctrl-names = "default";

arch/arm/boot/dts/sun4i-a10-hackberry.dts

+0 −4
Original line number Diff line number Diff line
@@ -18,10 +18,6 @@ 
	model = "Miniand Hackberry";

	compatible = "miniand,hackberry", "allwinner,sun4i-a10";



	chosen {

		bootargs = "earlyprintk console=ttyS0,115200";

	};



	soc@01c00000 {

		emac: ethernet@01c0b000 {

			pinctrl-names = "default";

arch/arm/boot/dts/sun4i-a10-mini-xplus.dts

+0 −4
Original line number Diff line number Diff line
@@ -18,10 +18,6 @@ 
	model = "PineRiver Mini X-Plus";

	compatible = "pineriver,mini-xplus", "allwinner,sun4i-a10";



	chosen {

		bootargs = "earlyprintk console=ttyS0,115200";

	};



	soc@01c00000 {

		uart0: serial@01c28000 {

			pinctrl-names = "default";

arch/arm/boot/dts/sun4i-a10.dtsi

+152 −2
Original line number Diff line number Diff line
@@ -17,6 +17,8 @@ 


	aliases {

		ethernet0 = &emac;

		serial0 = &uart0;

		serial1 = &uart1;

	};



	cpus {
@@ -70,6 +72,29 @@ 
			clocks = <&osc24M>;

		};



		pll4: pll4@01c20018 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-pll1-clk";

			reg = <0x01c20018 0x4>;

			clocks = <&osc24M>;

		};



		pll5: pll5@01c20020 {

			#clock-cells = <1>;

			compatible = "allwinner,sun4i-pll5-clk";

			reg = <0x01c20020 0x4>;

			clocks = <&osc24M>;

			clock-output-names = "pll5_ddr", "pll5_other";

		};



		pll6: pll6@01c20028 {

			#clock-cells = <1>;

			compatible = "allwinner,sun4i-pll6-clk";

			reg = <0x01c20028 0x4>;

			clocks = <&osc24M>;

			clock-output-names = "pll6_sata", "pll6_other", "pll6";

		};



		/* dummy is 200M */

		cpu: cpu@01c20054 {

			#clock-cells = <0>;
@@ -135,12 +160,11 @@ 
				"apb0_ir1", "apb0_keypad";

		};



		/* dummy is pll62 */

		apb1_mux: apb1_mux@01c20058 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-apb1-mux-clk";

			reg = <0x01c20058 0x4>;

			clocks = <&osc24M>, <&dummy>, <&osc32k>;

			clocks = <&osc24M>, <&pll6 1>, <&osc32k>;

		};



		apb1: apb1@01c20058 {
@@ -162,6 +186,126 @@ 
				"apb1_uart4", "apb1_uart5", "apb1_uart6",

				"apb1_uart7";

		};



		nand_clk: clk@01c20080 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c20080 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "nand";

		};



		ms_clk: clk@01c20084 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c20084 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "ms";

		};



		mmc0_clk: clk@01c20088 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c20088 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "mmc0";

		};



		mmc1_clk: clk@01c2008c {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c2008c 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "mmc1";

		};



		mmc2_clk: clk@01c20090 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c20090 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "mmc2";

		};



		mmc3_clk: clk@01c20094 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c20094 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "mmc3";

		};



		ts_clk: clk@01c20098 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c20098 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "ts";

		};



		ss_clk: clk@01c2009c {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c2009c 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "ss";

		};



		spi0_clk: clk@01c200a0 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c200a0 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "spi0";

		};



		spi1_clk: clk@01c200a4 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c200a4 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "spi1";

		};



		spi2_clk: clk@01c200a8 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c200a8 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "spi2";

		};



		pata_clk: clk@01c200ac {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c200ac 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "pata";

		};



		ir0_clk: clk@01c200b0 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c200b0 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "ir0";

		};



		ir1_clk: clk@01c200b4 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c200b4 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "ir1";

		};



		spi3_clk: clk@01c200d4 {

			#clock-cells = <0>;

			compatible = "allwinner,sun4i-mod0-clk";

			reg = <0x01c200d4 0x4>;

			clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;

			clock-output-names = "spi3";

		};

	};



	soc@01c00000 {
@@ -281,6 +425,12 @@ 
			reg = <0x01c23800 0x10>;

		};



		rtp: rtp@01c25000 {

			compatible = "allwinner,sun4i-ts";

			reg = <0x01c25000 0x100>;

			interrupts = <29>;

		};



		uart0: serial@01c28000 {

			compatible = "snps,dw-apb-uart";

			reg = <0x01c28000 0x400>;

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