[SCSI] stex: extend hard reset wait time (69f4a513) · Commits · 戴 / test

During hard bus reset of st_shasta controllers, 1 ms is not enough for 16-port controllers, although it's good for 8-port controllers. Extend the wait time to 100 ms to allow bus resets finish successfully. Signed-off-by:

Ed Lin <ed.lin@promise.com> Signed-off-by:

James Bottomley <James.Bottomley@SteelEye.com>

drivers/scsi/stex.c

+6 −1

Original line number	Diff line number	Diff line
		@@ -1041,7 +1041,12 @@ static void stex_hard_reset(struct st_hba *hba)
		pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &pci_bctl);
		pci_bctl \|= PCI_BRIDGE_CTL_BUS_RESET;
		pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
		msleep(1);

		/*
		* 1 ms may be enough for 8-port controllers. But 16-port controllers
		* require more time to finish bus reset. Use 100 ms here for safety
		*/
		msleep(100);
		pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
		pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);

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