Commit 69d468f4 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/priv: punt messages to debug level 



Ideally we'd be able to keep these at a more obvious error level, as
they're a good indication of us doing something wrong.

However, NVIDIA's FECS/GPCCS firmware touches registers that trigger
priv ring faults, and we can't do anything to fix that ourselves due
to the need for them to be signed by NVIDIA.

This issue was reported a while back, but hasn't been fixed, so, for
now we will hide the messages to prevent spamming Optimus users with
messages whenever the NVIDIA GPU is powered off and on again.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent a44ddbcb

drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c

+3 −3
Original line number Diff line number Diff line
@@ -30,7 +30,7 @@ gf100_ibus_intr_hub(struct nvkm_subdev *ibus, int i) 
	u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0400));

	u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0400));

	u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0400));

	nvkm_error(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat);

	nvkm_debug(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat);

	nvkm_mask(device, 0x122128 + (i * 0x0400), 0x00000200, 0x00000000);

}
@@ -41,7 +41,7 @@ gf100_ibus_intr_rop(struct nvkm_subdev *ibus, int i) 
	u32 addr = nvkm_rd32(device, 0x124120 + (i * 0x0400));

	u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0400));

	u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0400));

	nvkm_error(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat);

	nvkm_debug(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat);

	nvkm_mask(device, 0x124128 + (i * 0x0400), 0x00000200, 0x00000000);

}
@@ -52,7 +52,7 @@ gf100_ibus_intr_gpc(struct nvkm_subdev *ibus, int i) 
	u32 addr = nvkm_rd32(device, 0x128120 + (i * 0x0400));

	u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0400));

	u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0400));

	nvkm_error(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat);

	nvkm_debug(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat);

	nvkm_mask(device, 0x128128 + (i * 0x0400), 0x00000200, 0x00000000);

}

drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c

+3 −3
Original line number Diff line number Diff line
@@ -30,7 +30,7 @@ gk104_ibus_intr_hub(struct nvkm_subdev *ibus, int i) 
	u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0800));

	u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0800));

	u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0800));

	nvkm_error(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat);

	nvkm_debug(ibus, "HUB%d: %06x %08x (%08x)\n", i, addr, data, stat);

	nvkm_mask(device, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000);

}
@@ -41,7 +41,7 @@ gk104_ibus_intr_rop(struct nvkm_subdev *ibus, int i) 
	u32 addr = nvkm_rd32(device, 0x124120 + (i * 0x0800));

	u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0800));

	u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0800));

	nvkm_error(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat);

	nvkm_debug(ibus, "ROP%d: %06x %08x (%08x)\n", i, addr, data, stat);

	nvkm_mask(device, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000);

}
@@ -52,7 +52,7 @@ gk104_ibus_intr_gpc(struct nvkm_subdev *ibus, int i) 
	u32 addr = nvkm_rd32(device, 0x128120 + (i * 0x0800));

	u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0800));

	u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0800));

	nvkm_error(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat);

	nvkm_debug(ibus, "GPC%d: %06x %08x (%08x)\n", i, addr, data, stat);

	nvkm_mask(device, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000);

}

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