Commit 69973b48 authored by Grygorii Strashko's avatar Grygorii Strashko Committed by Vinod Koul
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dmaengine: ti: k3-udma-glue: move psi-l pairing in channel en/dis functions 



The NAVSS UDMA will stuck if target IP module is disabled by PM while PSI-L
threads are paired UDMA<->IP and no further transfers is possible. This
could be the case for IPs J721E Main CPSW (cpsw9g).

Hence, to avoid such situation do PSI-L threads pairing only when UDMA
channel is going to be enabled as at this time DMA consumer module expected
to be active already.

Signed-off-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
Acked-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20201030203000.4281-1-grygorii.strashko@ti.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 63497532

drivers/dma/ti/k3-udma-glue.c

+38 −26
Original line number Diff line number Diff line
@@ -303,19 +303,6 @@ struct k3_udma_glue_tx_channel *k3_udma_glue_request_tx_chn(struct device *dev, 
		goto err;

	}



	ret = xudma_navss_psil_pair(tx_chn->common.udmax,

				    tx_chn->common.src_thread,

				    tx_chn->common.dst_thread);

	if (ret) {

		dev_err(dev, "PSI-L request err %d\n", ret);

		goto err;

	}



	tx_chn->psil_paired = true;



	/* reset TX RT registers */

	k3_udma_glue_disable_tx_chn(tx_chn);



	k3_udma_glue_dump_tx_chn(tx_chn);



	return tx_chn;
@@ -378,6 +365,18 @@ EXPORT_SYMBOL_GPL(k3_udma_glue_pop_tx_chn); 


int k3_udma_glue_enable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn)

{

	int ret;



	ret = xudma_navss_psil_pair(tx_chn->common.udmax,

				    tx_chn->common.src_thread,

				    tx_chn->common.dst_thread);

	if (ret) {

		dev_err(tx_chn->common.dev, "PSI-L request err %d\n", ret);

		return ret;

	}



	tx_chn->psil_paired = true;



	xudma_tchanrt_write(tx_chn->udma_tchanx, UDMA_CHAN_RT_PEER_RT_EN_REG,

			    UDMA_PEER_RT_EN_ENABLE);
@@ -398,6 +397,13 @@ void k3_udma_glue_disable_tx_chn(struct k3_udma_glue_tx_channel *tx_chn) 
	xudma_tchanrt_write(tx_chn->udma_tchanx,

			    UDMA_CHAN_RT_PEER_RT_EN_REG, 0);

	k3_udma_glue_dump_tx_rt_chn(tx_chn, "txchn dis2");



	if (tx_chn->psil_paired) {

		xudma_navss_psil_unpair(tx_chn->common.udmax,

					tx_chn->common.src_thread,

					tx_chn->common.dst_thread);

		tx_chn->psil_paired = false;

	}

}

EXPORT_SYMBOL_GPL(k3_udma_glue_disable_tx_chn);
@@ -815,19 +821,6 @@ k3_udma_glue_request_rx_chn_priv(struct device *dev, const char *name, 
			goto err;

	}



	ret = xudma_navss_psil_pair(rx_chn->common.udmax,

				    rx_chn->common.src_thread,

				    rx_chn->common.dst_thread);

	if (ret) {

		dev_err(dev, "PSI-L request err %d\n", ret);

		goto err;

	}



	rx_chn->psil_paired = true;



	/* reset RX RT registers */

	k3_udma_glue_disable_rx_chn(rx_chn);



	k3_udma_glue_dump_rx_chn(rx_chn);



	return rx_chn;
@@ -1052,12 +1045,24 @@ EXPORT_SYMBOL_GPL(k3_udma_glue_rx_flow_disable); 


int k3_udma_glue_enable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn)

{

	int ret;



	if (rx_chn->remote)

		return -EINVAL;



	if (rx_chn->flows_ready < rx_chn->flow_num)

		return -EINVAL;



	ret = xudma_navss_psil_pair(rx_chn->common.udmax,

				    rx_chn->common.src_thread,

				    rx_chn->common.dst_thread);

	if (ret) {

		dev_err(rx_chn->common.dev, "PSI-L request err %d\n", ret);

		return ret;

	}



	rx_chn->psil_paired = true;



	xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_CTL_REG,

			    UDMA_CHAN_RT_CTL_EN);
@@ -1078,6 +1083,13 @@ void k3_udma_glue_disable_rx_chn(struct k3_udma_glue_rx_channel *rx_chn) 
	xudma_rchanrt_write(rx_chn->udma_rchanx, UDMA_CHAN_RT_CTL_REG, 0);



	k3_udma_glue_dump_rx_rt_chn(rx_chn, "rxrt dis2");



	if (rx_chn->psil_paired) {

		xudma_navss_psil_unpair(rx_chn->common.udmax,

					rx_chn->common.src_thread,

					rx_chn->common.dst_thread);

		rx_chn->psil_paired = false;

	}

}

EXPORT_SYMBOL_GPL(k3_udma_glue_disable_rx_chn);

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